參數(shù)資料
型號: TC7MP3125FK
廠商: Toshiba Corporation
英文描述: Low Voltage/Low Power 2-Bit 】 2 Dual Supply Bus Transceiver
中文描述: 低電壓/低功率2位】2雙電源總線收發(fā)器
文件頁數(shù): 14/23頁
文件大?。?/td> 338K
代理商: TC7MP3125FK
TC7MP3125FK/FTG
2007-10-19
14
AC Characteristics
(Ta
=
40 to 85°C, Input: t
r
=
t
f
=
2.0 ns)
V
CCA
=
2.5
±
0.2 V, V
CCB
=
3.3
±
0.3 V
Characteristics
Symbol
Test Condition
Min
Max
Unit
Propagation delay time
(Bn
An)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
5.4
3-state output enable time
(OE
An)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
8.4
3-state output disable time
(
OE
An)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
6.7
ns
Propagation delay time
(An
Bn)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
6.8
3-state output enable time
(
OE
Bn)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
8.7
3-state output disable time
(OE
Bn)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
3.9
ns
Output to output skew
t
osLH
t
osHL
(Note)
0.5
ns
Note: Parameter guaranteed by design.
(t
osLH
=
|t
pLHm
t
pLHn
|, t
osHL
=
|t
pHLm
t
pHLn
|)
V
CCA
=
1.8
±
0.15 V, V
CCB
=
3.3
±
0.3 V
Characteristics
Symbol
Test Condition
Min
Max
Unit
Propagation delay time
(Bn
An)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
8.9
3-state output enable time
(OE
An)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
13.4
3-state output disable time
(OE
An)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
10.9
ns
Propagation delay time
(An
Bn)
t
pLH
t
pHL
Figure 1, Figure 2
1.0
7.8
3-state output enable time
(OE
Bn)
t
pZL
t
pZH
Figure 1, Figure 3
1.0
10.7
3-state output disable time
(OE
Bn)
t
pLZ
t
pHZ
Figure 1, Figure 3
1.0
5.2
ns
Output to output skew
t
osLH
t
osHL
(Note)
0.5
ns
Note: Parameter guaranteed by design.
(t
osLH
=
|t
pLHm
t
pLHn
|, t
osHL
=
|t
pHLm
t
pHLn
|)
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