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參數(shù)資料
| 型號： | TC7211AMIPL |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | BUS COMPATIBLE 4-DIGIT CMOS DECODER/DRIVER |
| 中文描述： | 總線兼容4位的CMOS譯碼器/驅(qū)動器 |
| 文件頁數(shù)： | 6/7頁 |
| 文件大小： | 88K |
| 代理商： | TC7211AMIPL |
6-12
TELCOM SEMICONDUCTOR, INC.
BUS COMPATIBLE, 4-DIGIT
CMOS DECODER/DRIVER
TC7211AM
If more than four devices are slaved together, the
backplane signal should be derived externally and all
TC7211AM devices slaved to it. The external drive signal
must drive a high capacitive load with 1
μ
sec to 2
μ
sec rise
and fall times. The backplane frequency is normally 125
Hz. At lower display ambient temperatures, the frequency
may be reduced to compensate for display response time.
The on-chip RC oscillator free-runs at approximately
16 kHz. A divide-by 128 circuit provides the 125 Hz backplane
frequency. The oscillator frequency may be reduced by
connecting an external capacitor between the oscillator
terminal and V
+
. (See typical operating characteristics
curves.)
The free-running oscillator may be overridden (if de-
sired) by an external clock. The backplane driver, however,
must not be disabled during the external clock’s negative or
lOW portion, as this will result in a DC drive component
being applied to the LCD, limiting the LCD’s life. To
prevent backplane driver disabling, the oscillator input
should be driven from the positive supply to no less than
one-fifth the supply voltage above ground. A backplane
disable signal will not be sensed if the driving signal remains
above ground by one-fifth the supply voltage. An alternate
method for externally driving the oscillator permits the
oscillator input to swing the full supply voltage range. The
oscillator input signal duty cycle is skewed so the LOW
BASIC OPERATION
The TC7211AM drives 4-digit, 7-segment LCDs. This
device contains 28 individual segment drivers, a backplane
driver, a self-contained oscillator, and a divider chain to
generate the backplane signal.
The 28 CMOS segment drivers and backplane driver
contain ratioed N- and P-channel transistors for identical ON
resistance. The equal resistances eliminate the DC output
driver component resulting from unequal rise and fall times.
This ensures maximum LCD life.
The backplane output driver can be disabled by ground-
ing the OSCILLATOR input (pin 36). The 28 output segment
drivers can therefore be synchronized directly to an input
signal at the backplane (BP) terminal (pin 5). Several slave
devices may be cascaded to the backplane output of a
master device. The backplane signal may also be derived
from an external source. These features permit interfacing to
single backplane LCDs with characters in multiples of four.
Each slave’s backplane input represents a 200pF
capacitive load to the master backplane driver (comparable
to one additional segment). The number of slave devices
drivable by a master device is therefore set by the larger
display backplane capacitive load. The master backplane
output will drive the display backplane of 16 one-half-inch
characters with rise and fall times under 5
μ
sec. This
represents a system with three slave devices and a fourth
master device driving the backplane.
TYPICAL CHARACTERISTICS
30
25
20
15
10
5
1
2
3
4
5
6
7
Operating Supply Current
vs Supply Voltage
TA= –20
°
C
TA= +70
°
C
TA= +25
°
C
V+ VOLTS
I
μ
A
0
LCD DEVICES
DISPLAY BLANK
PIN 36 OPEN
180
150
120
90
60
30
0
Backplane Frequency
vs Supply Voltage
COSC = 0 pF
(PIN 36 OPEN)
V+ VOLTS
B
1
2
3
4
5
6
7
COSC = 22 pF
COSC = 220 pF
TA = +25
°
C
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