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參數(shù)資料
| 型號(hào)： | TC7211AMIPL |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | BUS COMPATIBLE 4-DIGIT CMOS DECODER/DRIVER |
| 中文描述： | 總線兼容4位的CMOS譯碼器/驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 88K |
| 代理商： | TC7211AMIPL |
6-11
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
INPUT DEFINITIONS
In this table, V
+
and GND are considered to be normal operating input logic levels. For lowest power consumption, input
signals should swing over the full supply.
Input
Pin No.
Condition
V
+
= Logic “1”
GND = Logic “0”
V
+
= Logic “1”
GND = Logic “0”
V
+
= Logic “1”
GND = Logic “0”
V
+
= Logic “1”
GND = Logic “0”
Floating or with
external capacitor GND
V
+
= Logical One
Function
B0
27
Ones (Least Significant)
B1
28
Twos
B2
29
Fours
B3
30
Eights (Most Significant)
Oscillator input. Disables BP output devices, allowing segments to be
synchronized to an external signal input at the BP terminal (pin 5)
DS2, DS1 = 00 Selects D4
DS2, DS1 = 01 Selects D3
DS2, DS1 = 10 Selects D2
DS2, DS1 = 11 Selects D1
When both CS1 and CS2 are LOW, the data and digit select input
latches are open or enabled.
On the rising of CS1 or CS2, data is latched, decoded and stored in
the output drive latches.
OSC
36
DS1
31
DS2
32
GND = Logical Zero
CS1
33
V
+
= Inactive
CS2
34
GND = Active
BUS COMPATIBLE, 4-DIGIT
CMOS DECODER/DRIVER
TC7211AM
Digit Select Inputs
DIGIT ASSIGNMENT
OUTPUT DEFINITIONS
Output pins are defined by the alphabetical segment assignment and numerical digital assignment.
Output
Pin No.
Function
Output
Pin No.
Function
A1
B1
C1
D1
E1
F1
G1
A2
B2
C2
D2
E2
F2
G2
37
38
39
40
2
4
3
6
7
8
9
10
12
11
A
B
C
D
E
F
G
A
B
C
D
E
F
G
Segment Drive
Digit 1
(LSD)
A3
B3
C3
D3
E3
F3
G3
A4
B4
C4
D4
E4
F4
G4
13
14
15
16
17
19
18
20
21
22
23
24
26
25
A
B
C
D
E
F
G
A
B
C
D
E
F
G
Segment Drive
Digit 3
Segment Drive
Digit 2
Segment Drive
Digit 4
(MSD)
Data Input Bits
G
A
B
C
F
E
D
D4
D3
D2
D1
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