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參數(shù)資料
| 型號： | TC7107RIPL |
| 元件分類： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP40 |
| 封裝： | REVERSE, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 623K |
| 代理商： | TC7107RIPL |
2002 Microchip Technology Inc.
DS21455B-page 7
TC7106/A/TC7107/A
36
(5)
VREF+
The analog input required to generate a full scale output (1999 counts). Place 100mV
between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See paragraph on Reference Voltage.
37
(4)
TEST
Lamp test. When pulled HIGH (to V+) all segments will be turned on and the display
should read -1888. It may also be used as a negative supply for externally generated
decimal points. See paragraph under TEST for additional information.
38
(3)
OSC3
See Pin 40.
39
(2)
OSC2
See Pin 40.
40
(1)
OSC1
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per
section), connect Pin 40 to the junction of a 100k
resistor and a 100pF capacitor.
The 100k
resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38.
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
Normal
Pin No.
(40-Pin PDIP)
(Reversed
Symbol
Description
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