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參數(shù)資料
| 型號： | TC6387XB |
| 廠商： | Toshiba Corporation |
| 英文描述： | SD Memory Card / SDIO Card Controller |
| 中文描述： | SD卡/ SDIO卡控制器 |
| 文件頁數(shù)： | 25/62頁 |
| 文件大小： | 1406K |
| 代理商： | TC6387XB |
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TC6387XB Specification
Rev. 1.0 02/02/06
TOTAL
62
PAGE NO.25
TOSHIBA CONFIDENTIAL
SDIO Card
(1) "0" is written into the SFOF bit(D4) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(2) "1" is written into the MFOF bit(D20) of SD Interrupt Mask Register(Offset:120-123h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
4.5.10 Time out error(command) interrupt
+ Interrupt Assert Condition
If the start bit of a response is not received within SDCLK period X 640(SD memory Card) or X 64(SDIO Card)
after the end bit of a command is transmitted to the card, this condition is considered a time out error and an
interrupt is generated.
+ Factor Evaluation Method
In the case of SD memory Card, the SCTO bit(D6) of SD Buffer Control & Error Status Register(Offset:01E-
01Fh) and the NCR bit(D16) of SD Error Detail Status Register(Offset:02C-02Fh) are set to "1". However, if a
response for automatically issued CMD12 is not received, the NRS bit(D17) is set to "1" for differentiation.
In the case of SDIO Card, the SCTO bit(D6) of SD Buffer Control & Error Status Register(Offset:11E-11Fh) and
the NCR bit(D16) of SD Error Detail Status Register(Offset:12C-12Fh) are set to "1".
+De-asserting Method
SD memory Card
(1) "0" is written into the SCTO bit(D6) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MCTO bit(D22) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
SDIO Card
(1) "0" is written into the SCTO bit(D6) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(2) "1" is written into the MCTO bit(D22) of SD Interrupt Mask Register(Offset:120-123h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
HCLK
SDCLK
SDCMD
#HINT
1
2
640(SD memory)
64(SDIO)
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