參數(shù)資料
型號: TC5565APL-15
廠商: Toshiba Corporation
英文描述: 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology
中文描述: 65,536位靜態(tài)隨機(jī)存取存儲器,可存儲8位為8192字利用CMOS技術(shù)
文件頁數(shù): 8/9頁
文件大小: 119K
代理商: TC5565APL-15
TC5565APL-10, TC5565APL-12, TC5565APL-15
TC5565AFL-10, TC5565AFL-12, TC5565AFL-15
Note 2 :
In \CE1 controlled data retention mode, minimum standby current mode is achieved under the condition Of CE2<= O.2V Or
CE2>= V
DD
-0.2V.
3 :
If the V
IH
of \CE1 is 2.2V in operation, I
DDS1
current flows during the period that the V
DD
voltage is going down from 4.5V to
2.4V,
4 ;
In CE2 controlled data retention mode, minimum standby current mode is achieved under the
condition of
CE2 <= 0.2V.
DEVICE INFORMATION
The TC5565APL/AFL is an synchronous RAM using address activated circuit technology, thus the internal operation is synchronous.
Then once row address change occur, the precharge operation is executed by internal pulse generated from row address transient.
Therefore the peak current flows only after row address change, as shown in the following figure.
This peak current may induce the noise on V
DD
/GND lines. Thus the use of about 0.1uF decoupling capacitor for every device is
recommended to eliminate such noise.
相關(guān)PDF資料
PDF描述
TC5565APL 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology
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