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參數(shù)資料
| 型號： | TC1320EUATR |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁數(shù)： | 13/14頁 |
| 文件大?。?/td> | 442K |
| 代理商： | TC1320EUATR |
TC1320
DS21386B-page 8
2002 Microchip Technology Inc.
FIGURE 4-1:
TIMING DIAGRAMS
4.6
Register Set and Programmer’s
Model
TABLE 4-2:
TC1320 COMMAND SET
(SMBus READ_BYTE AND
WRITE_BYTE)
TABLE 4-3:
CONFIGURATION REGISTER
(CONFIG), 8-BIT, READ/WRITE
tSU(START) tH(START)
tSU-DATA
tSU(STOP)
tIDLE
A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
A
SMBus Write Timing Diagram
SMBUS Read Timing Diagram
B
CD
E
F
G
H
IJ
K
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
ILOW IHIGH
I = Acknowledge Clock Pulse
J = STOP Condition
K = New START Condition
SCL
SDA
tSU(START) tH(START)
tSU-DATA
tH-DATA
tSU(STOP) tIDLE
A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
A
B
CD
E
F
G
H
I
J
KL
M
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = STOP Condition, Data Executed by Slave
M = New START Condition
ILOW IHIGH
SCL
SDA
Command Byte Description
Command
Code
Function
RWD
00h
Read/Write Data (DATA)
RWCR
01h
Read/Write Configuration
(CONFIG)
Configuration Register (CONFIG)
D[7] D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Reserved
SHDN
Bit
POR
Function
Type
Operation
D[0]
0
Standby Switch
Read/
Write
1 = Standby
0=Normal
D[7]-D[1]
0
Reserved;
Always returns
Zero when Read
N/A
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