參數(shù)資料
型號: TC1277
廠商: Microchip Technology Inc.
英文描述: 3-Pin Reset Monitors for 3.3V Systems
中文描述: 3引腳復位監(jiān)控器為3.3V系統(tǒng)
文件頁數(shù): 5/13頁
文件大?。?/td> 469K
代理商: TC1277
2002 Microchip Technology Inc.
DS21383B-page 5
TC1275/TC1276/TC1277
3.2
V
CC
Transient Rejection
The TC1275/TC1276/TC1277 provides accurate V
CC
monitoring and reset timing during power-up, power-
down, and brownout/sag conditions, and rejects
negative-going transients (glitches) on the power
supply line. Figure 3-5 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lays
under
the curve will
not
generate a
reset signal. Combinations above the curve are
detected as a brownout or power-down. Transient
immunity can be improved by adding a capacitor in
close proximity to the V
CC
pin of the TC1275/TC1276/
TC1277.
3.3
RESET Signal Integrity During
Power-Down
The TC1275 RESET output is valid to V
CC
= 1.2V.
Below this voltage the output becomes an "open
circuit" and does not sink current. This means CMOS
logic inputs to the
μ
P will be floating at an undeter-
mined voltage. Most digital systems are completely
shut down well above this voltage. However, in situa-
tions where RESET must be maintained valid to V
CC
=
0V, a pull-down resistor must be connected from
RESET to ground to discharge stray capacitances and
hold the output low (Figure 3-6). This resistor value,
though not critical, should be chosen such that it does
not appreciably load RESET under normal operation
(100k
will be suitable for most applications). Similarly,
a pull-up resistor to V
CC
is required for the TC1277 to
ensure a valid high RESET for V
CC
below 1.8V.
FIGURE 3-5:
MAXIMUM TRANSIENT
DURATION VS.
OVERDRIVE FOR GLITCH
REJECTION AT 25°C
FIGURE 3-6:
ENSURING RESET VALID
TO V
CC
= 0V
RESET COMPARATOR OVERDRIVE,
[
V
CCTP
- V
CC
]
(mV)
500
300
200
400
100
0
1
10
100
1000
μ
s
T
A
°
C
V
TH
Duration
Overdrive
V
CC
TC1275/6/7
TC1275
V
CC
V
CC
R1
100k
RESET
GND
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