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參數(shù)資料
| 型號： | TC10735.0VCT713 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 50mA and 100mA CMOS LDOs with Shutdown, ERROR Output and VREF Bypass |
| 中文描述： | 為50mA和100mA的CMOS低壓降穩(wěn)壓器具有關(guān)斷功能，錯誤輸出和VREF繞道 |
| 文件頁數(shù)： | 12/22頁 |
| 文件大小： | 651K |
| 代理商： | TC10735.0VCT713 |
TC1072/TC1073
DS21354D-page 12
2007 Microchip Technology Inc.
4.0
DETAILED DESCRIPTION
The TC1072 and TC1073 are precision fixed output
voltage regulators. (If an adjustable version is desired,
please see the TC1070/TC1071/TC1187 data sheet.)
Unlike bipolar regulators, the TC1072 and TC1073’s
supply current does not increase with load current. In
addition, V
OUT
remains stable and within regulation
over the entire 0 mA to I
OUT
load current range, (an
important consideration in RTC and CMOS RAM
battery back-up applications).
Figure 4-1
shows a typical application circuit. The
regulator is enabled any time the shutdown input
(SHDN) is at or above V
IH
, and shutdown (disabled)
when SHDN is at or below V
IL
. SHDN may be
controlled by a CMOS logic gate, or I/O port of a
microcontroller. If the SHDN input is not required, it
should be connected directly to the input supply. While
in shutdown, supply current decreases to 0.05 μA
(typical), V
OUT
falls to zero volts, and ERROR is open-
circuited.
FIGURE 4-1:
Typical Application Circuit.
4.1
ERROR Open-Drain Output
ERROR is driven low whenever V
OUT
falls out of
regulation by more than –5% (typical). This condition
may be caused by low input voltage, output current
limiting, or thermal limiting. The ERROR output voltage
value (e.g. ERROR = V
OL
at 4.75V (typical) for a 5.0V
regulator and 2.85V (typical) for a 3.0V regulator).
ERROR output operation is shown in
Figure 4-2
.
Note that ERROR is active tDELAY (typically, 2.5 μs)
after V
OUT
falls to V
TH
, and inactive when V
OUT
rises
above V
TH
by V
HYS
.
As shown in
Figure 4-1
, ERROR can be used as a
battery low flag, or as a processor RESET signal (with
the addition of timing capacitor C
2
). R
1
x C
2
should be
chosen to maintain ERROR below V
IH
of the processor
RESET input for at least 200 ms to allow time for the
system to stabilize. Pull-up resistor R
1
can be tied to
V
OUT
, V
IN
or any other voltage less than (V
IN
+ 0.3V).
FIGURE 4-2:
Error Output Operation.
4.2
Output Capacitor
A 1 μF (minimum) capacitor from V
OUT
to ground is
recommended. The output capacitor should have an
effective series resistance greater than 0.1
Ω
and less
than 5.0
Ω
, and a resonant frequency above 1 MHz. A
1 μF capacitor should be connected from V
IN
to GND if
there is more than 10 inches of wire between the
regulator and the AC filter capacitor, or if a battery is
used as the power source. Aluminum electrolytic or
tantalum capacitor types can be used. (Since many
aluminum
electrolytic
approximately
-30°C,
recommended for applications operating below -25°C.)
When operating from sources other than batteries,
supply-noise rejection and transient response can be
improved by increasing the value of the input and
output capacitors and employing passive filtering
techniques.
capacitors
solid
freeze
at
tantalums
are
4.3
Bypass Input
A 470 pF capacitor connected from the Bypass input to
ground reduces noise present on the internal
reference, which in turn significantly reduces output
noise. If output noise is not a concern, this input may be
left unconnected. Larger capacitor values may be
used, but results in a longer time period to rated output
voltage when power is initially applied.
TC1072
TC1073
V
OUT
SHDN
GND
ERROR
1
μ
F
C1
+
V
IN
V
OUT
Shutdown Control
(to CMOS Logic or Tie
to V
IN
if unused)
1
μ
F
+
Battery
+
0.2
μ
F
C2
C2 Required Only
if ERROR is used as a
Processor RESET Signal
(See Text)
R1
1M
V+
BATTLOW
or RESET
Bypass
C3, 470 pF
V
TH
V
OUT
ERROR
V
IH
V
OL
HYSTERESIS (V
H
)
t
DELAY
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