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參數(shù)資料
| 型號(hào)： | TC10732.5VCT713 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 50mA and 100mA CMOS LDOs with Shutdown, ERROR Output and VREF Bypass |
| 中文描述： | 為50mA和100mA的CMOS低壓降穩(wěn)壓器具有關(guān)斷功能，錯(cuò)誤輸出和VREF繞道 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 651K |
| 代理商： | TC10732.5VCT713 |
2007 Microchip Technology Inc.
DS21354D-page 13
TC1072/TC1073
5.0
THERMAL CONSIDERATIONS
5.1
Thermal Shutdown
Integrated thermal protection circuitry shuts the
regulator off when die temperature exceeds 160°C.
The regulator remains off until the die temperature
drops to approximately 150°C.
5.2
Power Dissipation
The amount of power the regulator dissipates is
primarily a function of input and output voltage, and
output current. The following equation is used to
calculate worst-case
actual
power dissipation:
EQUATION 5-1:
The
(
Equation 5-2
) is a function of the maximum ambient
temperature (T
A
MAX
), the maximum allowable die tem-
perature (T
J
MAX
) and the thermal resistance from junc-
tion-to-air (
θ
JA
). The 6-Pin SOT-23 package has a
θ
JA
of approximately 220°C/Watt.
maximum
allowable
power
dissipation
EQUATION 5-2:
Equation 5-1
can be used in conjunction with
Equation 5-2
to ensure regulator thermal operation is
within limits. For example:
Given:
V
IN
MAX
V
OUT
MIN
I
LOAD
MAX
T
J
MAX
T
A
MAX
Find:
= 3.0V ±5%
= 2.7V – 2.5%
= 40 mA
= 125°C
= 55°C
1. Actual power dissipation
2. Maximum allowable dissipation
Actual power dissipation:
P
D
≈
(V
INMAX
– V
OUTMIN
)I
LOADMAX
= [(3.0 x 1.05) – (2.7 x 0.975)] x 40 x 10
–3
= 20.7 mW
Maximum allowable power dissipation:
In this example, the TC1072 dissipates a maximum of
20.7 mW; below the allowable limit of 318 mW. In a
similar manner,
Equation 5-1
and
Equation 5-2
can be
used to calculate maximum current and/or input
voltage limits.
5.3
Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower
θ
JA
and therefore
increase the maximum allowable power dissipation
limit.
Where:
P
D
≈
(V
INMAX
– V
OUTMIN
)I
LOADMAX
P
D
V
IN
MAX
V
OUT
MIN
I
LOAD
MAX
= Worst-case actual power dissipation
= Maximum voltage on V
IN
= Minimum regulator output voltage
= Maximum output (load) current
P
DMAX
= (T
JMAX
– T
AMAX
)
θ
JA
where all terms are previously defined.
P
DMAX
= (T
JMAX
– T
AMAX
)
θ
JA
= (125 – 55)
220
= 318 mW
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