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參數(shù)資料
| 型號： | TC1073-50VCH |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 50mA and 100mA CMOS LDOs with Shutdown, ERROR Output and VREF Bypass |
| 中文描述： | 為50mA和100mA的CMOS低壓降穩(wěn)壓器具有關(guān)斷功能，錯誤輸出和VREF繞道 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 564K |
| 代理商： | TC1073-50VCH |
2002 Microchip Technology Inc.
DS21354B-page 5
TC1072/TC1073
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin No.
(6-Pin SOT-23A)
Symbol
Description
1
2
3
V
IN
GND
SHDN
Unregulated supply input.
Ground terminal.
Shutdown control input. The regulator is fully enabled when a logic high is applied to this
input. The regulator enters shutdown when a logic low is applied to this input. During
shutdown, output voltage falls to zero and supply current is reduced to 0.05
μ
A (typical).
Out-of-Regulation Flag. (Open drain output). This output goes low when V
OUT
is out-of-
tolerance by approximately – 5%.
Reference bypass input. Connecting a 470pF to this input further reduces output noise.
Regulated voltage output.
4
ERROR
5
6
Bypass
V
OUT
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