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參數(shù)資料
| 型號： | TB62600FG |
| 廠商： | Toshiba Corporation |
| 英文描述： | 64BIT SHIFT REGISTER / LATCH DRIVER |
| 中文描述： | 64移位寄存器/鎖存驅(qū)動 |
| 文件頁數(shù)： | 6/15頁 |
| 文件大?。?/td> | 504K |
| 代理商： | TB62600FG |
TB62600FG
2006-08-07
6
TERMINAL DESCRIPTION
PIN NAME
PIN No.
FUNCTION
CLOCK
97
Input Terminals for Shift register Clock.
ENABLE
84
"L" : All Outputs "On". Pull
Down Input Terminal.
RESET
98
"L" : Reset shift register and latch.
Pull
Down Input Terminal.
D0~D7
88~95
Input Terminals for Output Data.
"H" : Output On, "L" : Output Off.
MMV
C/R
78
CR Connection Terminal for CR Timer (MMV)
MMV
OUT
79
Output Terminal for CR Timer (MMV)
63
~
OUT0
―
Output Terminals. These are Open Drain Outputs.
SELECT
83
Input Terminal for Input Mode Data.
"H" : 8bit Parallel Input Mode, "L" : 1bit Serial Input Mode.
S
OUT
96
Output Terminal for Serial Data "D63".
LATCH1 /
2
LATCH
86 / 85
Input Terminal for Latch.
"H" : Data Throught, "L" : Data Latch.
V
DD
81, 100
Supply Voltage Terminal for Control Logic.
L
GND
82, 99
Ground Terminal for Control Logic
P
GND
―
Ground Terminal for Drivers. 10 Terminals.
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