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參數資料
| 型號： | TAS5631PHD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | AUDIO AMPLIFIER, PQFP64 |
| 封裝： | GREEN, PLASTIC, HTQFP-64 |
| 文件頁數： | 16/34頁 |
| 文件大?。?/td> | 1823K |
| 代理商： | TAS5631PHD |
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SLES221C – JULY 2009 – REVISED APRIL 2010
output LC filter. The typical duration is <15 ms/mF. While the PPSC detection is in progress, SD is kept low, and
the device does not react to changes applied to the RESET pin. If no shorts are present, the PPSC detection
passes, and SD is released. A device reset does not start a new PPSC detection. PPSC detection is enabled in
BTL and PBTL output configurations; the detection is not performed in SE mode. To make sure not to trip the
PPSC detection system, it is recommended not to insert resistive load to GND_X or PVDD_X.
OVERTEMPERATURE PROTECTION
The two different package options have individual overtemperature protection schemes.
PHD Package
The TAS5631 PHD package option has a three-level temperature-protection system that asserts an active-low
warning signal (OTW1) when the device junction temperature exceeds 100°C (typical), (OTW2) when the device
junction temperature exceeds 125°C (typical) and, if the device junction temperature exceeds 155°C (typical), the
device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (Hi-Z)
state and SD being asserted low. OTE is latched in this case. To clear the OTE latch, RESET must be asserted.
Thereafter, the device resumes normal operation.
DKD Package
The TAS5631 DKD package option has a two-level temperature-protection system that asserts an active-low
warning signal (OTW) when the device junction temperature exceeds 125°C (typical) and, if the device junction
temperature exceeds 155°C (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs
being set in the high-impedance (Hi-Z) state and SD being asserted low. OTE is latched in this case. To clear the
OTE latch, RESET must be asserted. Thereafter, the device resumes normal operation.
UNDERVOLTAGE PROTECTION (UVP) AND POWER-ON RESET (POR)
The UVP and POR circuits of the TAS5631 fully protect the device in any power-up/down and brownout situation.
While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are fully
operational when the GVDD_X and VDD supply voltages reach values stated in the Electrical Characteristics
table. Although GVDD_X and VDD are independently monitored, a supply-voltage drop below the UVP threshold
on any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z)
state and SD being asserted low. The device automatically resumes operation when all supply voltages have
increased above the UVP threshold.
DEVICE RESET
When RESET is asserted low, all power-stage FETs in the four half-bridges are forced into a high-impedance
(Hi-Z) state.
In BTL modes, to accommodate bootstrap charging prior to switching start, asserting the reset input low enables
weak pulldown of the half-bridge outputs. In the SE mode, the output is forced into a high-impedance state when
asserting the reset input low. Asserting the reset input low removes any fault information to be signaled on the
SD output, i.e., SD is forced high. A rising-edge transition on the reset input allows the device to resume
operation after an overload fault. To ensure thermal reliability, the rising edge of reset must occur no sooner than
4 ms after the falling edge of SD.
SYSTEM DESIGN CONSIDERATIONS
A rising-edge transition on the reset input allows the device to execute the startup sequence and start switching.
Apply only audio when the state of READY is high; that starts and stops the amplifier without having audible
artifacts that are heard in the output transducers. If an overcurrent protection event is introduced, the READY
signal goes low; hence, filtering is needed if the signal is intended for audio muting in non-microcontroller
systems.
The CLIP signal indicates that the output is approaching clipping. The signal can be used to either an audio
volume decrease or intelligent power supply controlling a low and a high rail.
The device inverts the audio signal from input to output.
The VREG pin is not recommended to be used as a voltage source for external circuitry.
Copyright 2009–2010, Texas Instruments Incorporated
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Product Folder Link(s): TAS5631
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TAS5631PHD2EVM | 功能描述:音頻 IC 開發(fā)工具 TAS5631PHD Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TAS5631PHDR | 功能描述:音頻放大器 PWM inp 300W Stereo RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS564K015P1A | 制造商:Cornell Dubilier Electronics 功能描述:Cap Tant Solid 0.56uF 15V 10% (3.43 X 7.26mm) Axial 125°C T/R |
| TAS564K020P1A | 制造商:Cornell Dubilier Electronics 功能描述:CAPACITOR TANT, 0.56UF, 20V, AXIAL 10%, Product Range:CORNELL DUBILIER - TAS Ser 制造商:Cornell Dubilier Electronics 功能描述:Cap Tant Solid 0.56uF 20V 10% (3.43 X 7.26mm) Axial 125°C T/R |
| TAS564K034P0A | 制造商:Cornell Dubilier Electronics 功能描述: 制造商:Mallory Sonalert Products Inc 功能描述: |
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