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參數(shù)資料
| 型號： | TAS5026APAG |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | GREEN, PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 18/64頁 |
| 文件大?。?/td> | 936K |
| 代理商： | TAS5026APAG |
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Architecture Overview
19
SLES068A—February 2003—Revised January 2004
TAS5026A
Attenuation (Gain) dB
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
110
100
90
80
70
60
50
40
30
20
10
0
10
20
Step
Size
dB
STEP SIZE
vs
ATTENUATION (GAIN)
Figure 210. Attenuation Curve
The volume control format for each channel is expressed in 8 bits. The volume for each channel is set by writing
8 bits via the serial control interface. The MSB bit is written first as in the bit position 0 (LSB position).
The volume for each channel can be set using a single or multiple address write operation to the volume control
register via the serial control interface. Changing the volume of all six channels requires that 6 registers be
updated.
To coordinate the volume adjustment of multiple channels simultaneously, the TAS5026A performs a delayed
volume update upon receiving a volume change command. Following the completion of the register volume
write operations, the TAS5026A waits for 5 ms for another volume command to be given. If no volume
command is issued in that period of time, the TAS5026A starts adjusting the volume of the channels that
received volume settings.
While a volume update is being performed, the system status register indicates that the update is in progress.
During the update, all subsequent volume control setting requests that are sent to the TAS5026A are received
and stored as a single next value for a subsequent update. If more than one volume setting request is sent,
only the last is retained.
Table 29. Volume Register
VOLUME REGISTER
D7
D6
D5
D4
D3
D2
D1
D0
Vol
Bit 7
Vol
Bit 6
Vol
Bit 5
Vol
Bit 4
Vol
Bit 3
Vol
Bit 2
Vol
Bit 1
Vol
Bit 0
2.3.2 Mute
The application of mute ramps the volume from any setting to noiseless hard mute state. There are two
methods in which the TAS5026A can be placed into mute. The TAS5026A is placed in the noiseless mute when
the MUTE terminal is asserted low for a minimum of 3 MCLK_IN cycles. Alternatively, the mute mode can be
initiated by setting the mute bit in the system control register through the serial control interface. The
TAS5026A is held in mute state as long as the terminal is low or I2C mute setting is active. This command uses
quiet entry and exit sequences to and from the hard mute state.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS5026APAGG4 | 功能描述:音頻 DSP 6Ch Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS5026APAGR | 功能描述:音頻 DSP 6Ch Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS5026APAGRG4 | 功能描述:音頻 DSP 6Ch Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS5026CPAG | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIX CHANNEL DIGITAL AUDIO PWM PROCESSOR |
| TAS5026IPAG | 功能描述:多媒體雜項(xiàng) Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube |
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