參數(shù)資料
型號(hào): TAS5015IPFB
廠商: Texas Instruments, Inc.
元件分類: 運(yùn)動(dòng)控制電子
英文描述: TRUE DIGITAL AUDIO AMPLIFIER TAS5015 DIGITAL AUDIO PWM PROCESSOR
中文描述: 真正的數(shù)字音頻放大器TAS5015數(shù)字音頻PWM處理器
文件頁(yè)數(shù): 9/19頁(yè)
文件大?。?/td> 240K
代理商: TAS5015IPFB
TAS5015
SLES017
SEPTEMBER 2001
9
www.ti.com
functional description (continued)
de-emphasis filter
For audio sources that have been preemphasized, a precision 50
μ
s/15
μ
s de-emphasis filter is provided to
support the sampling rates of 44.1 kHz and 48 kHz. Pins DEM_SEL and DEM_EN select the de-emphasis
functions. See Figure 6 for a graph showing the de-emphasis filtering characteristics. See Table 3 for
de-emphasis selection.
0
10
R
3.18 (50
μ
s)
10.6 (15
μ
s)
f
Frequency
kHz
De-emphasis
Figure 6. De-Emphasis Filter Characteristics
de-emphasis selection
De-emphasis selection is accomplished by using the DEM_SEL and DEM_EN pins. See Table 3 for
de-emphasis selection description.
Table 3. De-Emphasis Selection
DEM_SEL
DEM_EN
DESCRIPTION
0
0
De-emphasis disabled
0
1
De-emphasis enabled for Fs = 44.1 kHz
1
1
De-emphasis enabled for Fs = 48 kHz
1
0
Disallowed state. Do not use.
error status reporting (VALID_L and VALID_R)
The following is a list of the error conditions that will cause the VALID_L and VALID_R pins to be asserted low.
No clocks
Clock phase errors
When either of the above conditions is met, the VALID_L and VALID_R goes low and the PWM outputs go to
the hard mute state. If the error condition is removed, the TAS5015 is reinitialized and the VALID_L and VALID_R
pins are asserted high.
serial interface formats
The TAS5015 is compatible with eight different serial interfaces. Available interface options are IIS, right
justified, left justified, and DSP frame. Table 4 indicates how these options are selected using the MOD0, MOD1,
and MOD2 pins.
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