參數(shù)資料
型號: TAS3103EVM
廠商: Texas Instruments, Inc.
英文描述: Evaluation Module for Digital Audio Processor With 3D Effects(帶3維效果的數(shù)字音頻處理器TAS3103的評估模塊)
中文描述: 評估模塊用于數(shù)字音頻處理器,3D音效(帶3維效果的數(shù)字音頻處理器TAS3103的評估模塊)
文件頁數(shù): 12/22頁
文件大小: 90K
代理商: TAS3103EVM
Data Flow Switches
2-2
2.1
Data Flow Switches
Figure 2
2 illustrates the data flow selections available. The data format
settings for the ADCs, the DACs, the SPDIF Rx, and the SPDIF Tx are all
hard-wired to the I
2
S format. For this reason, data into and out of the I
2
S ports
must be I
2
S formatted data if any of these devices are to be used.
Switch S2 selects between I
2
S input header data and ADC data. The I
2
S input
header routes four serial data streams to the TAS3103s
SDIN1, SDIN2,
SDIN3, and SDIN4. The ADCs only supply SDIN1, SDIN2, and SDIN3.
The SDIN2, SDIN3, and SDIN4 selections made by S2 directly route to both
TAS3103s. (Note that a source for SDIN4 is only available on the I
2
S input
header). The SDIN1 selection made by S2 also directly routes to TAS3103
U2. But for TAS3103
U1, the SDIN1 selection made by S2 undergoes one
more selection process that allows SPDIF Rx data to replace the S2 selection
for SDIN1. This selection process is controlled by S4.
Table 2
1 summarizes the input data options.
Table 2
1.Data Input Options
Switch Settings
TAS3103 Input Data
S2
S4
SDIN1
SDIN2
I
2S
header
I
2S
header
SDIN3
I
2S
header
I
2S
header
SDIN4
I
2S
header
I
2S
header
0
0
SPDIF Rx
I
2S
header
0
1
1
0
SPDIF Rx
ADC
ADC
N/A
1
1
ADC
ADC
ADC
N/A
TAS3103 output data can also be fed back into input port SDIN3 on both
TAS3103s. Switches S12, S13, and S14 provide the selections between
S2-selected input data and the feedback data. For the input into SDIN3 on
TAS3103
U2, S12 selects between the S2-selected SDIN3 input data and the
SDOUT3 output from TAS3103
U1. For the input into SDIN3 on
TAS3103
U1, switches S13 and S14 allow the user to select between the
S2-selected SDIN3 input data, its own SDOUT3 output, or the SDOUT3 output
from TS3103
U2.
Table 2
2 summarizes the data options for the TAS3103 SDIN3 inputs.
Table 2
2.TAS3103 SDIN3 Port Selections
Switch Settings
SDIN3 – TAS3103 – U1
SDIN3 – TAS3103 – U2
S12
S13
S14
0
0
0
SDOUT3
U1
SDIN3
I2S/ADC
SDOUT3
U2
SDIN3
I2S/ADC
SDOUT3
U1
SDIN3
I2S/ADC
SDOUT3U2
SDIN3I2S/ADC
SDOUT3
U1
SDOUT3
U1
SDOUT3
U1
SDOUT3
U1
SDIN3
I2S/ADC
SDIN3
I2S/ADC
SDIN3I2S/ADC
SDIN3I2S/ADC
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
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