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參數(shù)資料
| 型號(hào)： | T8207 |
| 廠商： | Lineage Power |
| 英文描述： | Asychronous Transfer Mode (ATM) Interconnect(異步傳輸模式互連器件) |
| 中文描述： | 異步轉(zhuǎn)移模式（ATM）的互連（異步傳輸模式互連器件） |
| 文件頁(yè)數(shù)： | 3/4頁(yè) |
| 文件大小： | 145K |
| 代理商： | T8207 |
Product Brief
April 2000
CelXpres T8207
Asynchronous Transfer Mode (ATM) Interconnect
Lucent Technologies Inc.
3
13
Description
(continued)
The CelXpres T8207 may be configured as an ATM or
PHY level device providing cell routing between UTO-
PIA and a 32-bit wide GTL+ bus. In addition to the 32
data signals, the bus has the following signals:
I
Read clock
I
Write clock
I
Frame sync
I
Acknowledge
ATM cells arriving at the UTOPIA receive interface may
get VPI and VCI translation and routing information
from a look-up table in external SRAM. An external
synchronous dynamic random access memory
(SDRAM) is used to extend the buffering for ATM cells
destined for the UTOPIA transmit interface. This exter-
nal SDRAM may be partitioned into four or less inde-
pendently sized queues per PHY. The four queues may
be used to implement QoS using different priorities for
each queue.
The CelXpres T8207 provides a shared UTOPIA mode,
which allows two devices on different cell buses to
share the same UTOPIA bus in ATM mode. Using a
glueless interface between the two T8207s, the chips
resolve queue priorities for the PHYs and arbitrate the
use of the UTOPIA bus. This shared mode can be used
to provide redundancy or increase the system capacity.
In addition, an external microprocessor may send or
receive control or loopback cells through the micropro-
cessor interface. The 8-bit microprocessor interface
may be configured to be Motorola or Intel compatible
and is used to configure and monitor the device.
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