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參數(shù)資料
| 型號： | T8207 |
| 廠商： | Lineage Power |
| 英文描述： | Asychronous Transfer Mode (ATM) Interconnect(異步傳輸模式互連器件) |
| 中文描述： | 異步轉(zhuǎn)移模式（ATM）的互連（異步傳輸模式互連器件） |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 145K |
| 代理商： | T8207 |
2
Lucent Technologies Inc.
CelXpres T8207
Asynchronous Transfer Mode (ATM) Interconnect
Product Brief
April 2000
3
Description
The CelXpres T8207 device integrates all of the required functionality to transport ATM cells across a backplane
architecture with high-speed cell traffic exceeding 1.5 Gbits/s to a maximum of 32 destinations. The management
of multiple service classes and monitoring of performance on ATM and PHY interfaces is incorporated in the
device’s functionality. Traffic delivery to multi-PHYs (MPHYs) is managed through the UTOPIA interface.
The CelXpres T8207 device meets the ATM Forum’s universal test and operations PHY interface for ATM (UTOPIA)
Level 1, version 2.01 and Level 2, version 1.0 specifications for cell-level handshake and MPHY data path opera-
tion. The T8207 supports the required MPHY operation as described in sections 4.1 and 4.2 of the ATM Forum’s
Level 2 specification. The T8207 supports MPHY operation for up to 32 ports. In addition to the required UTOPIA
signals, the optional transmit parity (TxPRTY) and receive parity (RxPRTY) signals are provided.
5-7542.r1
Figure 1. Functional Block Diagram
ONE OR TWO
32K TO 256K x 8
(LUT) SRAMs
LOOK-UP
ENGINE
RX
UTOPIA
INTERFACE
RX PHY
FIFO
(16 CELLS)
CONTROL CELL
TX FIFO
(1 CELL)
LOOPBACK
FIFO
(1 CELL)
CONTROL CELL
RX FIFO
(16 CELLS)
TX PHY
FIFO
(128 CELLS)
SDRAM
INTERFACE
TX UTOPIA
CELL BUFFER
1M TO 16M x 16
SDRAM
MICROPROCESSOR
INTERFACE
MICRO-
PROCESSOR
CELL BUS
INPUT FIFO
CELL BUS
ARBITER
CELL BUS
MONITORING
CELL BUS
INTERFACE
CELL BUS
TX
UTOPIA
INTERFACE
RX
UTOPIA
TX
UTOPIA
(4 CELLS)
(64 CELLS)
RX UTOPIA
FIFO
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