參數(shù)資料
型號: T7296
廠商: Lineage Power
英文描述: Integrated Line Transmitter(集成PCM線傳送器)
中文描述: 綜合線變送器(集成的PCM線傳送器)
文件頁數(shù): 3/16頁
文件大?。?/td> 396K
代理商: T7296
Data Sheet
February 2000
T7296 DS3/STS-1/E3
Integrated Line Transmitter
3
Lucent Technologies Inc.
Pin Information
(continued)
Table 1. Pin Descriptions
* If a bipolar violation occurs, RPOS and RNEG can correspond to decoded versions of RPDATA and RNDATA, respectively. If DECODIS is high, RPOS and RNEG
always track RPDATA and RNDATA, respectively.
Note: Pins with the I
u
designation have an internal pull-up.
Pin
1
2
Symbol
RCLK
RLOOP
Type
I
I
Name/Function
Receive Clock Input.
Input sampling clock for RPDATA and RNDATA.
Remote Loopback.
A high on this pin causes RPDATA and RNDATA to be trans-
mitted to the line using RCLK. Setting LLOOP and RLOOP high simultaneously is
not permitted.
Local Loopback.
A high on this pin causes TPDATA and TNDATA to pass through
the encoder and output at RPOS and RNEG, respectively. Setting LLOOP and
RLOOP high simultaneously is not permitted.
DS3, STS-1, or
E3
Select.
A high on this pin selects DS3 or STS-1 operation and
sets the encoder and decoder in B3ZS mode. A low selects E3 operation and sets
the encoder and decoder in HDB3 mode.
Transmit All 1s Select.
A high on this pin causes a continuous AMI all-1s pattern
to be transmitted to the line. The frequency is determined by TCLK.
5 V Digital Supply (±5%).
For all logic circuitry.
Transmit Positive Data.
TPDATA is sampled on the falling edge of TCLK. Pins 7
and 8 can be tied together for binary input signals.
Transmit Negative Data.
TNDATA is sampled on the falling edge of TCLK. Pins 7
and 8 can be tied together for binary input signals.
Transmit Clock for TPDATA and TNDATA.
Digital Ground.
For all logic circuitry.
Encoder Disable.
A high on this pin disables B3ZS or HDB3 encoding functions,
unless overridden by a TAOS request. Set ENCODIS high if TPDATA and TNDATA
are already encoded.
Decoder Disable.
A high on this pin disables B3ZS or HDB3 decoding functions.
Bipolar Violation Output.
This pin goes high for one bit period when a bipolar
violation or a coding error not corresponding to the appropriate coding rule is
detected in the RPDATA/RNDATA signals.
Receive Binary Data.
The signal on this pin is the ORed-output of RPOS and
RNEG.
Receive Negative Data.
This signal is the decoded version of RNDATA.*
Receive Positive Data.
This signal is the decoded version of RPDATA.*
Receive Clock Output.
This signal is the inverted version of RCLK.
Driver Monitor Output.
If no transmitted AMI signal is present on MTIP and
MRING for 128 ± 32 TCLK clock periods, DMO goes high until the next AMI signal
is detected.
Monitor Ring Input.
AMI signal from TRING can be connected to this pin for line
driver failure detection. Internally pulled high.
Monitor Tip Input.
AMI signal from TTIP can be connected to this pin for line
driver failure detection. Internally pulled high.
Analog Ground.
For analog circuitry.
Transmit Ring Output.
Transmit AMI signal is driven to the line via a 1:1 trans-
former from this pin.
Transmit Tip Output.
Transmit AMI signal is driven to the line via a 1:1 trans-
former from this pin.
5 V Analog Supply (±5%).
For analog circuitry.
3
LLOOP
I
4
DS3, STS-1/E3
I
5
TAOS
I
6
7
V
DDD
TPDATA
I
8
TNDATA
I
9
10
11
TCLK
GND
D
ENCODIS
I
I
12
13
DECODIS
BPV
I
O
14
RNRZ
O
15
16
17
18
RNEG
RPOS
RCLKO
DMO
O
O
O
O
19
MRING
I
u
20
MTIP
I
u
21
22
GND
A
TRING
O
23
TTIP
O
24
V
DDA
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