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參數(shù)資料
| 型號： | T6B70BFG |
| 廠商： | Toshiba Corporation |
| 英文描述： | Interface IC for Hot Water Dispensers |
| 中文描述： | 接口集成電路熱飲水機 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大小： | 406K |
| 代理商： | T6B70BFG |
T6B70BFG
2007-07-19
4
2. Amplifier input circuit and signal detection/non-detection circuit (reception block)
The modulation signal input block is equipped with high and a low comparator to detect only when the
external sine wave signal’s amplitude is above the defined threshold. In this way, signals with amplitudes
lower than the specified threshold (e.g., noise signals) are prevented from being mistakenly detected as sine
waves.
The detection frequency range (frequency window) is determined by the divider ratio 1/17 to 1/15 of F
osc
.
Detection/non-detection confirmation conditions are such that when the signals within the specified
frequency range are detected (or not detected) in succession, the signals are controlled. It takes about 9 to 15
waves (based on F
osc
1/16 frequency) to make detection/non-detection confirmation in this manner.
V
DD
V
DD
VH
VL
Input
sensitivity
V
PP
Reception detected
AMP IN input sine waveform
Reception non-detected
Reception non-detected
Reception non-detected
VH
VL
VBIAS
Held at high
VBIAS
<
VL
VBIAS
>
VH
VH
>
VBIAS
>
VL VH
>
VBIAS
>
VL
AMPOUT output timing (/RESET
=
L)
AMPOUT
Held at low
AMPOUT Truth Table
VA
VB
AMPOUT
VBIAS
>
VH
L
H
L
VH
>
VBIAS
>
VL
H
H
Hold
VBIAS
<
VL
H
L
H
7
AMPIN pin
R
R
R
R
V
SS
Reference
voltage
VH
+
VBIAS
Low comparator
Reference
voltage
VL
High comparator
VA
VB
R
S
Q
Q
+
Cycle
measurement
counter
Detection
/non-detection
judgment
circuit
9
/DOUT pin
6
AMPOUT pin
V
SS
A
A
RESET
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