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參數(shù)資料
| 型號(hào)： | T6B65AFG |
| 廠商： | Toshiba Corporation |
| 英文描述： | Column Driver LSI for Dot Matrix Graphic LCD’s |
| 中文描述： | 列的點(diǎn)陣圖形液晶顯示器的驅(qū)動(dòng)器LSI |
| 文件頁數(shù)： | 4/15頁 |
| 文件大小： | 476K |
| 代理商： | T6B65AFG |
T6B65AFG
2005-06-01
4
Pin Functions
Pin Name
Pin No .
I / O
Function
SEG1 to SEG80
1 to 80
Output
Column driver outputs
CL
96
Input
Shift clock pulse
PM
95
Input
Pre-frame signal input
/
φ
94
Input
Clock signal
DB0 to DB7
81 to 88
I / O
Data bus
D / I
93
Input
Data/instruction select signal input
(Note 1)
/ WR
92
Input
Write select signal input
(Note 2)
/ CE
91
Input
Chip enable signal input
(Note 3)
/ RST
89
Input
Reset signal input: / RST = L ......... Reset state
V
DD
, V
SS
90, 97
―
Power supply
V
LC2, 3, 5
98, 99, 100
―
Power supply for LCD drive
Note 1: D / I = H ……………… Indicates that the data on DB0 to DB7 is display data.
D / I = L ……………… Indicates that the data on DB0 to DB7 is control data.
Note 2: / WR = H ………..…… Read is selected.
/ WR = L ………..…… Write is selected.
Note 3: When writing………… Data on DB0 to DB7 is latched on the rising edge of / CE.
When reading…..…… Data appears at DB0 to DB7 while / CE is LOW.
Function of Each Block
●
Interface
The T6B65AFG is equipped with interface logic enabling interfacing to an 8-bit (80-family) MPU.
●
Input register
This register holds 8-bit data from the MPU. Instruction and display data are distinguished by the D / I
signal and the 8-bit data.
●
Output register
This register holds 8-bit data from the display RAM. When display data is read, the display data in the
address is copied to this register. The address is then automatically incremented or decremented. When an
address is set, therefore, the correct data does not appear on the first data reading. The data at the specified
address appears on the second data reading.
●
X, Y (Page)-address counter
The X, Y (Page)-address counter holds a display RAM address. Reading or writing to the display RAM causes
the X / Y-address to increment or decrement automatically.
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