
TE
CH
tm
FUNCTIONAL DESCRIPTION 
Pin Functions 
(Segment mode) 
SYMBOL 
V
DD
Logic system power supply pin, connected to +2.5 to +5.5 V. 
Vss 
Ground pin, connected to 0 V. 
Bias power supply pins for LCD drive voltage 
 Normally use the bias voltages set by a resistor divider. 
 Ensure that voltages are set such that Vss < V
43 
< V
12 
< V
0
. 
 V
iL
 and V
iR 
( 
i= 0 , 12 , 43
) must connect to an external power supply , and supply 
 regular voltage which is assigned by specification for each power pin. 
Input pins for display data 
 In 4-bit parallel input mode, input data into the 4 pins, DI
3
-DI
0
.  
 Connect DI
7
-DI
4
 to Vss or V
DD
. 
 In 8-bit parallel input mode, input data into the 8 pins, DI
7
- DI
0
. 
 Refer to “ 
RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD 
 DRIVE OUTPUT PINS
” in Functional Operations. 
Clock input pin for taking display data 
 Data is read at the falling edge of the clock pulse. 
Latch pulse input pin for display data 
 Data is latched at the falling edge of the clock pulse. 
Input pin for selecting the reading direction of display data 
 When set to Vss level “L” , data is read sequentially from Y
160
 to Y
1
. 
 When set to V
DD
 level “H” , data is read sequentially from Y
1 
to Y
160
. 
 Refer to “ 
RELATIONSHIP BETWEEN THE DISPLAY DATA AND LCD 
 DRIVE OUTPUT PINS
” in Functional Operations. 
Control input pin for output of non-select level 
 The input signal is level-shifted from logic voltage level to LCD drive voltage 
 level, and controls the LCD drive circuit. 
 When set to Vss level “L”, the LCD drive output pins (Y
1
-Y
160
) are set to  
 level Vss. 
 When set to “L” , the contents of the line latch are reset , but the display data 
 are read in the data latch regardless of the condition of /DISPOFF. When the 
 /DISPOFF function is canceled , the driver outputs non-select level (V
12
 or 
V
43
), then outputs the contents of the data latch at the next falling edge of the LP. 
At that time, if /DISPOFF removal time does not correspond to what is shown in 
AC characteristics, it can not output the reading data correctly. 
 Table of truth values is shown in “
TRUTH TABLE
” in Functional Operations. 
AC signal input pin for LCD drive waveform 
 The input signal is level-shifted from logic voltage level to LCD drive voltage 
 level, and controls the LCD drive circuit. 
 Normally it inputs a frame inversion signal. 
 The LCD drive output pins’ output voltage levels can be set using the line latch 
output signal and the FR signal. 
 Table of truth values is shown in “
TRUTH TABLE
” in Functional Operations. 
T66H0002A
TM Technology Inc. reserves the right
        P. 9         
Publication Date: JUL. 2002 
to change products or specifications without notice.                       Revision:A
FUNCTION 
V
0L
 , V
0R
V
12L
 , V
12R
V
43L
 , V
43R
DI
7
 , DI
0
XCK 
LP 
L/R 
/DISPOFF 
FR