
TE
CH
tm
FUNCTIONAL OPERATIONS OF EACH BLOCK 
BLOCK 
In case of segment mode, controls the selection or non-selection of the chip. 
Following and LP signal input, and after the chip selection signal is input, a 
selection signal is generated internally until 160 bits of data have been read in. 
Once data input has been completed, a selection signal for cascade connection is 
output, and the chip is non-selected. In case of common mode, controls the 
input/output data of bi-directional pins. 
In case of segment mode, keeps input data which are 2 clocks of XCK at 4-bit 
parallel input mode in latch circuit, or keeps input data which are 1 clock of 
XCK at 8-bit parallel input mode in latch circuit; after that they are put on the 
internal data 8 bits at a time. 
In case of segment mode, selects the state of the data latch which reads in the 
data bus signals. The shift direction is controlled by the control logic. For every 
16 bits of data read in, the selection signal shifts one bit based on the state of the 
control circuit. 
In case of segment mode, latches the data on the data bus. The latch state of each 
LCD rive output pin is controlled by the control logic and the data latch control; 
160 bits of data are read in 20 sets of 8 bits. 
In case of segment mode, all 160 bits which have been read into the data latch 
are simultaneously latched at the falling edge of the LP signal, and are output to 
the level shifter block. In case of common mode, shifts data from the data input 
pin at the falling edge of the LP signal. 
The logic voltage signal is level-shifted to the LCD drive voltage level, and in 
output to the driver block. 
Drives the LCD drive output pins from the line latch/shift register data, and 
selects one of 4 levels(V
0
,V
12
,V
43
, or V
ss
) based on the S/C, FR and /DISPOFF 
signals. 
Controls the operation of each block. In case of segment mode, when an LP 
signal has been input, all blocks are rest and the control logic waits for the 
selection signal output from the active control block. Once the selection signal 
has been output, operation of the data latch and data transmission is controlled, 
160 bits of data are read in , and the chip in non-selected. In case of common 
mode, controls the direction of data shift. 
T66H0002A
TM Technology Inc. reserves the right
        P. 8         
Publication Date: JUL. 2002 
to change products or specifications without notice.                       Revision:A
FUNCTION 
Active Control 
SP Conversion & 
Data Control 
Data Latch Control 
Data Latch 
Line Latch/ 
Shift Register 
Level Shifter 
4-Level driver 
Control Logic