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參數(shù)資料
| 型號： | SYM53C140 |
| 廠商： | LSI CORP |
| 元件分類： | 其它接口 |
| 英文描述： | Ultra2 SCSI Bus Expander(Ultra2 SCSI總線擴(kuò)展器) |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PQFP160 |
| 封裝： | 32 MM, PLASTIC, QFP-160 |
| 文件頁數(shù)： | 24/68頁 |
| 文件大?。?/td> | 928K |
| 代理商： | SYM53C140 |
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2-10
Functional Descriptions
3.
The final stage develops pull-up and pull-down controls for the SCSI
I/O logic, including 3-state controls for the pull-up.
4.
A parallel function ensures that bus (transmission line) recovery is for
a specified time after the last signal deassertion on each signal line.
2.1.7.7 Select Control (SSEL)
A_SSEL and B_SSEL are control signals used during bus arbitration and
selection. Whichever side asserts, SSEL propagates it to the other side.
If both signals are asserted at the same time, the A Side receives SSEL
and sends it to the B Side. This output has pull-down control for an open
collector driver. The signal goes through the following processing steps:
1.
The input signal is blocked if it is being driven by the SYM53C140.
2.
The next stage is a leading edge filter. This ensures that the output
will not switch for a specified time after the leading edge. The
duration of the input signal then determines the duration of the
output.
3.
A parallel function ensures that bus (transmission line) recovery
occurs for a specified time after the last signal deassertion on each
signal line.
2.1.7.8 Differential Direction Controls
A_SD[15:0], A_SDP[1:0], A_SBSY, A_SSEL, A_SCD, A_SIO, A_SMSG,
A_SREQ, A_SACK, A_SATN, A_SRST, B_SD[15:0], B_SDP[1:0],
B_SBSY, B_SSEL, B_SCD, B_SIO, B_SMSG, B_SREQ, B_SACK,
B_SATN, and B_SRST are all multimode signals. The mode is controlled
by the HVD_MODE input pins and the voltage is sensed at the
DIFFSENS inputs.
When High-Voltage Differential signaling is selected and the DIFFSENS
line sees the proper voltage input, all the minus signal leads become
single-ended inputs/outputs to HVD drivers/receivers. All plus signals
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