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參數(shù)資料
| 型號(hào)： | SY89859UMY TR |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX 8:1 PREC LVPECL 44MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | SY89 |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 8:1 |
| 獨(dú)立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-VFQFN 裸露焊盤，44-MLF? |
| 供應(yīng)商設(shè)備封裝： | 44-MLF?（7x7） |
| 包裝： | 帶卷 (TR) |
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Micrel, Inc.
SY89859U
December 2007
M9999-120607-D
hbwhelp@micrel.com or (408) 955-1690
7
AC Electrical Characteristics
(7)
VCC = +2.5V ±5% or 3.3V ±10%; VIN
≥100mV (200mVpp); R
L = 50
to V
CC–2V; TA = –40°C to +85°C, unless
otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
2.5
Gbps
2.5
3.5
GHz
tpd
Differential Propagation Delay
IN-to-Q
SEL-to-Q
360
475
640
ps
200
600
850
ps
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
IN-to-Q
300
fs/
oC
SEL-to-Q
400
tSKEW
Output-to-Output Skew
Note 8
5
20
ps
Part-to-Part Skew
Note 9
200
ps
tJITTER
Data
Random Jitter (RJ)
Note 10
1
psRMS
Deterministic Jitter (DJ)
Note 11
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 12
1
psRMS
Total Jitter (TJ)
Note 13
10
psPP
Adjacent Channel Crosstalk-induced Jitter
Note 14
0.7
psRMS
tr, tf
Output Rise/Fall Time (20% to 80%)
At full output swing.
50
110
180
ps
Notes:
7.
High-frequency AC-parameters are guaranteed by design and characterization.
8.
Output-to-output skew is measured between two different outputs under identical input transitions.
9.
Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs.
10. Random jitter is measured with a K28.7 character pattern, measured at <fMAX.
11. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23–1 PRBS pattern.
12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
13. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more
than the specified peak-to-peak jitter value.
14. Crosstalk-induced jitter is defined as the added jitter that results from signals applied to two adjacent channels. It is measured at the output
while applying two similar, differential clock frequencies that are asynchronous with respect to each other at the inputs.
Single-Ended and Differential Swings
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89871U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/ FANOUT BUFFER WI/INTERNAL TERMINATION |
| SY89871U_07 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER |
| SY89871UMG | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 2.5V/3.3V PECL Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY89871UMG TR | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 2.5V/3.3V PECL Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY89871UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER |
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