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參數(shù)資料
| 型號： | SY89859UMY TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 8/13頁 |
| 文件大小： | 0K |
| 描述： | IC MUX 8:1 PREC LVPECL 44MLF |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | SY89 |
| 類型： | 多路復(fù)用器 |
| 電路： | 1 x 8:1 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-VFQFN 裸露焊盤，44-MLF? |
| 供應(yīng)商設(shè)備封裝： | 44-MLF?（7x7） |
| 包裝： | 帶卷 (TR) |
Micrel, Inc.
SY89859U
December 2007
M9999-120607-D
hbwhelp@micrel.com or (408) 955-1690
4
Pin Description
Pin Number
Pin Name
Pin Function
20, 18
16, 14
13, 11
9, 7
5, 3
1, 43
42, 40
38, 36
IN0, /IN0
IN1, /IN1
IN2, /IN2
IN3, /IN3
IN4, /IN4
IN5, /IN5
IN6, /IN6
IN7, /IN7
Differential Inputs: These input pairs are the differential signal inputs to the device.
Inputs accept AC- or DC-coupled signals as small as 100mV (200mVpp). Each pin of
a pair internally terminates to a VT pin through 50
. Note that these inputs will default
to an indeterminate state if left open. Please refer to the “Input Interface Applications”
section for more details.
19, 15
12, 8
4, 44
41, 37
VT0, VT1
VT2, VT3
VT4, VT5
VT6, VT7
Input Termination Center-Tap: Each side of the differential input pair terminates to a
VT pin. The VT pins provide a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details. For a
CML or LVDS inputs, the VT pin is left floating.
17
10
2
39
VREF-AC0
VREF-AC1
VREF-AC2
VREF-AC3
Reference Voltage: These outputs bias to VCC–1.2V. They are used when AC
coupling the inputs (IN, /IN). For AC-coupled applications, connect VREF-AC to the
VT pin and bypass with a 0.01F low ESR capacitor to VCC. See “Input Interface
Applications” section for more details.
21
22
35
SEL0
SEL1
SEL2
The single-ended TTL/CMOS-compatible inputs select the inputs to the multiplexer.
Note that this input is internally connected to a 25k
pull-up resistor and will default
to a logic HIGH state if left open. The threshold voltage is VTH = VCC/2.
24, 27, 29, 32
VCC
Positive Power Supply. Bypass with 0.1F||0.01F low ESR capacitors and place as
close to each VCC pin as possible.
25, 26
30, 31
Q0, /Q0
Q1, /Q1
Differential Outputs: These 100K-compatible LVPECL output pairs are the outputs of
the device. Unused output pairs may be left open. Each output is designed to drive
800mV into 50
terminated to VCC–2V.
23, 28, 33
GND
Exposed Pad
Ground. GND and exposed pad must both be connected to the same ground plane.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89871U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER/ FANOUT BUFFER WI/INTERNAL TERMINATION |
| SY89871U_07 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER |
| SY89871UMG | 功能描述:時鐘驅(qū)動器及分配 2.5V/3.3V PECL Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY89871UMG TR | 功能描述:時鐘驅(qū)動器及分配 2.5V/3.3V PECL Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY89871UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER |
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