V
參數(shù)資料
型號(hào): SY89853UMG
廠商: Micrel Inc
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK MUX 2:1 2.5GHZ 32-MLF
標(biāo)準(zhǔn)包裝: 60
系列: Precision Edge®
類型: 多路復(fù)用器
電路數(shù): 2
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,PECL
輸出: LVPECL
頻率 - 最大: 2.5GHz
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤(pán),32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 管件
其它名稱: 576-3710
SY89853UMG-ND
Micrel, Inc.
SY89853U
August 2007
6
M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(6)
VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C, RL = 50
to V
CC–2V, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
NRZ Data
2.5
Gbps
Clock, VOUT > 400mV
2.5
GHz
tpd
Propagation Delay
IN-to-Q
SEL-to-Q
160
250
360
ps
100
260
400
ps
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
143
fs/ C
tSKEW
Input-to-Input Skew (Within-bank)
Bank-to-Bank Skew
Note 7
10
20
ps
Note 8
12
25
ps
tJITTER
Data
Random Jitter (RJ)
Note 9
1
psRMS
Deterministic Jitter (DJ)
Note 10
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 11
1
psRMS
Total Jitter (TJ)
Note 12
10
psPP
Crosstalk-Induced Jitter
Channel-to-Channel (Within-bank)
Note 13, within-bank
0.7
psRMS
tr, tf
Output Rise/Fall Time (20% to 80%)
At full output swing.
50
100
180
ps
Notes:
6.
High-speed AC parameters are guaranteed by design and characterization. VIN swing
≥ 100mV, unless otherwise stated.
7.
Input-to-input skew is the difference in time between two inputs to the output within a bank.
8.
Bank-to-bank skew is the difference in time from input to the output between banks.
9.
Random jitter is measured with a K28.7 character pattern, measured at <fMAX.
10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23-1 PRBS pattern.
11. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
12. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more than
the specified peak-to-peak jitter value.
13. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other
at the inputs.
相關(guān)PDF資料
PDF描述
SY89854UMY TR IC CLK BUFFER TRANSLA 1:4 16-MLF
SY89855UMG TR IC MUX 4:1 LVPECL PREC LP 32-MLF
SY89856UMG TR IC CLK BUFF MUX 2:6 3GHZ 32-MLF
SY89858UMG TR IC CLOCK BUFFER 1:8 3GHZ 32-MLF
SY89859UMY TR IC MUX 8:1 PREC LVPECL 44MLF
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SY89853UMG TR 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Low Power, Precision Dual 2:1 LVPECL MUX (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量(輸入/輸出):2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
SY89853UMGTR 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision Low-Power Dual 2:1 LVPECL MUX with Internal Termination
SY89854U 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision Low Power 1:4 LVPECL Fanout
SY89854U_07 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination
SY89854U_10 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision Low Power 1:4 LVPECL Fanout