參數(shù)資料
型號(hào): SY89852UMG TR
廠商: Micrel Inc
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 0K
描述: IC MUX 2:1 LVPECL DIFF LP 16-MLF
標(biāo)準(zhǔn)包裝: 1,000
系列: SY89
類型: 多路復(fù)用器
電路: 1 x 2:1
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 帶卷 (TR)
其它名稱: SY89852UMGTR
SY89852UMGTR-ND
Micrel, Inc.
SY89852U
October 2008
M9999-100208-D
hbwhelp@micrel.com or (408) 955-1690
3
Pin Description
Pin Number
Pin Name
Pin Function
1,2,
3,4
IN, /IN
Differential Input: This input pair is the signal to be buffered. These inputs accept
AC- or DC-coupled signals as small as 100mV (200mVPP). Each pin of this pair
internally terminates to a VT pin through 50
. Note that this input will default to
an indeterminate state if left open. Please refer to the “Input Interface
Applications” section for more details.
16,5
VT
Input Termination Center-Tap: Each side of the differential input pair terminates
to this pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See “Input Interface Applications” section for more
details.
8,13
VCC
Positive Power Supply. Bypass with 0.1
F0.01F low ESR capacitors as close
to the VCC pin as possible.
12,9
Q, /Q
Differential 100K LVPECL Output: This LVPECL output is the output of the
device. Terminate through 50
to V
CC –2V.
PECL output requires DC path to
ground. Thus, AC-coupled applications require pull-down resistors. See “Output
Interface Applications” section.
10,11,14,15
GND,
Exposed Pad
Ground. Ground pin and exposed pad must be connected to the same ground
plane.
6
SEL
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25K
pull-up resistor
and will default to logic HIGH state if left open.
7
NC
No connect.
Truth Table
IN0
IN1
SEL
(1)
Q
0
X
0
1
X
0
1
X
0
1
0
X
1
Note:
1. SEL is connected to a 25k
pull-up resistor and will default to logic high if left open.
Functional Block Diagram
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