- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2117 > SY89843UMG TR (Micrel Inc)IC MUX CML RPE 2:1 PREC 24-MLF PDF資料下載
參數(shù)資料
| 型號： | SY89843UMG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 0K |
| 描述： | IC MUX CML RPE 2:1 PREC 24-MLF |
| 標準包裝： | 1,000 |
| 系列： | SY89 |
| 類型： | 多路復用器 |
| 電路： | 1 x 2:1 |
| 獨立電路： | 1 |
| 電壓電源： | 單電源 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，24-MLF? |
| 供應(yīng)商設(shè)備封裝： | 24-MLF?（4x4） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY89843UMGTR SY89843UMGTR-ND |
Micrel, Inc.
SY89843U
Oct. 1, 2013
11
M9999-052207-B
hbwhelp@micrel.com or (408) 955-1690
Case #4 Input Clock Failure: Switching from the
selected clock input stuck in an undetermined state
to a valid clock input (RPE enabled).
If CLK1 fails to an undetermined state (e.g.,
amplitude falls below the 100mV (VIN) minimum
single-ended input limit, or 200mV differentially)
before the RPE MUX selects CLK2 (using the SEL
pin), the switchover to the valid clock CLK2 will
occur either following Case #2 or Case #3,
depending upon the last valid state at the CLK1.
If the selected input clock fails to a floating, static, or
extremely low signal swing, including 0mV, the FSI
function will eliminate any metastable condition and
guarantee a stable output signal. No ringing and no
undetermined state will occur at the output under
these conditions.
Please note that the FSI function will not prevent
duty cycle distortions or runt pulses in case of a
slowly deteriorating (but still toggling) input signal.
Due to the FSI function, the propagation delay will
depend on rise and fall time of the input signal and
on its amplitude. Refer to “Typical Operating
Characteristics” for more detailed information.
Timing Diagram 4
Power-On Reset (POR) Description
The SY89843U includes an internal power-on reset
(POR) function to ensure the RPE logic starts-up in
a known logic state once the power-supply voltage is
stable. An external capacitor connected between
VCC and the CAP pin (pin 16) controls the delay for
the power-on reset function.
Calculating the required capacitor value is based on
the time the system power supply needs to power up
to a minimum of 2.3V. The time constant for the
internal power-on-reset must be greater than the
time required for the power supply to ramp up to a
minimum of 2.3V.
The following equation describes this relationship:
As an example, if the time required for the system
power supply to power up past 2.3V is 12ms, the
required capacitor value on pin 16 would be:
C(
F)
≥
C(
F) ≥
C(
F) ≥
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY89844UMG TR | IC MUX LVDS RPE 2:1 PREC 24-MLF |
| SY89845UMG TR | IC MUX CML RPE 2:1 PREC 24-MLF |
| SY89846UMG TR | IC CLK BUFF MUX 2:5 2GHZ 32-MLF |
| SY89847UMG TR | IC CLK BUFF MUX 2:5 2GHZ 32-MLF |
| SY89850UMG TR | IC DRVR/RCVR LVPECL PREC 8-MLF |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89844U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 MUX with 1:2 Fanout and Internal Termination |
| SY89844U_10 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 |
| SY89844UMG | 功能描述:編碼器、解碼器、復用器和解復用器 2.5V 2:1 RPE/FSI LVDS MUX w/ 1:2 Fanout (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY89844UMG TR | 功能描述:編碼器、解碼器、復用器和解復用器 2.5V 2:1 RPE/FSI LVDS MUX w/ 1:2 Fanout (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY89844UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 MUX with 1:2 Fanout and Internal Termination |
發(fā)布緊急采購，3分鐘左右您將得到回復。