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參數(shù)資料
型號(hào): SY89841UMG
廠商: Micrel Inc
文件頁(yè)數(shù): 10/15頁(yè)
文件大小: 0K
描述: IC MUX 2:1 LVDS RPE 16-MLF
標(biāo)準(zhǔn)包裝: 100
系列: SY89
類型: 多路復(fù)用器
電路: 1 x 2:1
獨(dú)立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1090 (CN2011-ZH PDF)
其它名稱: 576-2095-5
SY89841UMG-ND
Micrel, Inc.
SY89841U
February 2005
M9999-021405
hbwhelp@micrel.com or (408) 955-1690
4
Pin Description
Pin Number
Pin Name
Pin Function
4, 1,
16, 13
IN0, /IN0,
IN1, /IN1
Differential Inputs: These input pairs are the differential signal inputs to the
device. These inputs accept AC- or DC-coupled signals as small as 100mV.
Each pin of a pair internally terminates to a VT pin through 50 . Please refer to
the “Input Interface Applications” section for more details.
2, 14
VREF-AC0
VREF-AC1
Reference Voltage: This output biases to V
CC –1.2V. It is used for AC-coupling
inputs IN and /IN. Connect V
REF-AC directly to the corresponding VT pin. Bypass
with 0.01F low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA.
Due to the limited drive capability, the VREF-AC pin is only intended to drive its
respective VT pin. See the “Input Interface Applications” section for more details.
3, 15
VT0, VT1
Input Termination Center-Tap: Each side of the differential input pair terminates
to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network
for maximum interface flexibility. See the “Input Interface Applications” section
for more details.
5, 8, 12
VCC
Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close
to the VCC pins as possible.
6, 7
Q, /Q
Differential Outputs: This LVDS differential output is a logic function of the IN0,
IN1, and SEL inputs. Please refer to the truth table below for details.
10
SEL
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25k
pull-up resistor
and will default to logic HIGH state if left open.
9
GND
Exposed Pad
Ground: Ground and exposed pad must be connected to the same ground
plane.
11
CAP
Power-On Reset (POR) Initialization capacitor. When using the multiplexer with
RPE capability, this pin is tied to a capacitor to V
CC. The purpose is to ensure the
internal RPE logic starts up in a known state. See “Power-On Reset (POR)
Description” section for more details regarding capacitor selection. If this pin is
tied directly to V
CC, the RPE function will be disabled and the multiplexer will
function as a normal multiplexer. The CAP pin should never be left open.
Truth Table
Inputs
Outputs
IN0
/IN0
IN1
/IN1
SEL
Q
/Q
01
X
001
10
X
010
X
01101
X
10110
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參數(shù)描述
SY89841UMG TR 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Precision 2:1 LVDS MUX w/ RPE & FSI (I Temp, Green) RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量(輸入/輸出):2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
SY89841UMGTR 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision LVDS Runt Pulse Eliminator 2:1 Multiplexer
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