hbwhelp@micrel.com or (408) 955-1690 14 Zero Delay FB" />
參數(shù)資料
型號(hào): SY89538LHY TR
廠商: Micrel Inc
文件頁(yè)數(shù): 6/23頁(yè)
文件大?。?/td> 0K
描述: IC SYNTH/FANOUT BUFFER 64TQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: Precision Edge®
類型: 時(shí)鐘合成器/扇出緩沖器
PLL:
輸入: CMOS,HSTL,LVDS,LVPECL,LVTTL,SSTL,晶體
輸出: LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 3:7
差分 - 輸入:輸出: 是/是
頻率 - 最大: 756MHz
除法器/乘法器: 是/無(wú)
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 64-EP-TQFP
包裝: 帶卷 (TR)
Micrel, Inc.
SY89538L
January 2008
M9999-010808-E
hbwhelp@micrel.com or (408) 955-1690
14
Zero Delay FBIN Input
The SY89538L features a zero delay MUX that forces
the output to be at the same phase relationship as the
reference. This effectively configures the SY89538L
as a zero delay buffer when FBSEL is logic HIGH and
the output is fed into the feedback input FBIN as
shown in Figures 3a and 3b.
Figure 3a. Zero Delay Mode
(LVDS Output)
Figure 3b. Zero Delay Mode
(LVPECL Output)
How Does Zero Delay Work?
From the block diagram,
Divider
FBK
Divider
Ref.
FBIN
RFCK
f
and
f
FBK
REF
=
When the PLL is locked, fREF = fFBK and since Ref.
Divider = FBK Divider, fRFCK is forced to equal fFBIN.
In zero delay mode, fOUT is fed into FBIN, therefore,
fRFCK is forced to equal fOUT.
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