參數(shù)資料
型號(hào): SY89537LMY
廠商: Micrel Inc
文件頁(yè)數(shù): 1/19頁(yè)
文件大?。?/td> 0K
描述: IC SYNTHESIZER/FANOUT BUFF 44MLF
標(biāo)準(zhǔn)包裝: 260
系列: Precision Edge®
類(lèi)型: 時(shí)鐘/頻率合成器
PLL:
輸入: CMOS,HSTL,LVDS,LVPECL,LVTTL,SSTL,晶體
輸出: LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 3:7
差分 - 輸入:輸出: 是/是
頻率 - 最大: 756MHz
除法器/乘法器: 是/無(wú)
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-VFQFN 裸露焊盤(pán),44-MLF?
供應(yīng)商設(shè)備封裝: 44-MLF?(7x7)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 1083 (CN2011-ZH PDF)
其它名稱: 576-3239
SY89537L
3.3V Precision LVPECL and LVDS
Programmable Multiple Output Bank Clock
Synthesizer and Fanout Buffer
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
December 2007
M9999-121207-B
hbwhelp@micrel.com or (408) 955-1690
General Description
The
SY89537L
integrated
programmable
clock
synthesizer and fanout is part of a precision PLL-
based clock generation family optimized for enterprise
switch, router, and multiprocessor server applications.
This family is ideal for generating internal system
timing requirements up to 700MHz for multiple ASICs,
FPGAs, and NPUs. These devices integrate the
following blocks into a single monolithic IC:
PLL (Phase-Lock-Loop) based synthesizer
Fanout buffers
Clock generator (dividers)
Logic translation (LVPECL, LVDS)
Five independently programmable output
banks
This level of integration minimizes additive jitter and
part-to-part skew associated with discrete alternatives,
resulting in superior system-level timing with reduced
board space and power. For applications that require
a zero-delay function, see the SY89538L.
All
support
documentation
can
be
found
on
Micrel’s web site at: www.micrel.com.
Applications
Enterprise routers, switches, servers and
workstations
Parallel processor-based systems
Internal system clock generation for ASICs, NPUs,
FPGAs
Markets
LAN/WAN
Enterprise servers
Test and measurement
Precision Edge
Features
Integrated programmable synthesizer with multiple
output dividers, fanout buffers, and clock drivers
Direct interface to crystal: 14MHz to 18MHz
Input MUX accepts a reference and a crystal
(XTAL) source
– Ideal for reference backup clock source or
system test frequency source
– Patent-pending unique input MUX isolates XTAL
and reference inputs minimizes crosstalk
Guaranteed AC performance:
– 87.15MHz to 700MHz output frequency range
(with RFCK at 16.6MHz)
– <100psPP total jitter
– <7psRMS cycle-to-cycle jitter
– <8psPP deterministic jitter
– <0.7psRMS crosstalk induced jitter
– <50ps bank-to-bank skew
Output bank synchronization control pin
LVPECL and LVDS outputs
TTL/CMOS compatible control logic
Five independently programmable output
frequency banks:
– Four differential LVPECL output banks
– One differential LVDS output bank with 3 output
pairs
Separate output enable for each bank
3.3V ±10% power supply (2.5V output capable)
Guaranteed over the commercial and industrial
temperature range (-40C to +85C)
Available in 44-pin (7mm x 7mm) QFN package
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