Precision Edge SY89536L Micrel, Inc. M9999-010808 hbwhelp@micrel.com or (408) 955-1690 V
參數(shù)資料
型號(hào): SY89536LHC
廠商: Micrel Inc
文件頁(yè)數(shù): 13/16頁(yè)
文件大小: 0K
描述: IC SYNTHESIZR LVPECL/HSTL 64TQFP
標(biāo)準(zhǔn)包裝: 160
系列: Precision Edge®
類(lèi)型: 時(shí)鐘/頻率合成器
PLL: 帶旁路
輸入: CMOS,HSTL,LVDS,LVPECL,LVTTL,SSTL
輸出: HSTL,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:13
差分 - 輸入:輸出: 是/是
頻率 - 最大: 500MHz
除法器/乘法器: 是/無(wú)
電源電壓: 1.6 V ~ 3.6 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 64-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 64-EP-TQFP
包裝: 托盤(pán)
6
Precision Edge
SY89536L
Micrel, Inc.
M9999-010808
hbwhelp@micrel.com or (408) 955-1690
V
CC_LOGIC = VCCA/C = +3.3V ±10%, VCCOB = +1.8V ±10%
Symbol
Parameter
Condition
Min
Typ
Max
Units
fIN
Reference Input Frequency
14
160
MHz
fOUT
Output Frequency Range
33.33
500
MHz
tVCO
Internal VCO Frequency Range
600
1000
MHz
tskew
Within Device Skew
Within Bank PECL
Note 9
——
50
ps
Within Bank HSTL
Note 9
——
75
ps
Bank-to-Bank
Note 9
60
150
ps
Part-to-Part Skew
Note 10
——
200
ps
tLOCK
Maximum PLL Lock Time
——
10
ms
tJITTER
Cycle-to-Cycle Jitter
(Pk-to-Pk)
Note 11
——
50
ps
Period Jitter
(rms)
Note 12
——
50
ps
tpw (min)
Minimum Pulse Width
50
——
ps
Target PLL Loop Bandwidth
Feedback Divider Ratio: 66
Note 13
1.0
MHz
Feedback Divider Ratio: 30
Note 13
2.0
MHz
tDC
fOUT Duty Cycle
45
50
55
%
tr, tf
Output Rise/Fall Time
(20% to 80%)
LVPECL_Out
250
400
ps
HSTL_Out
100
400
ps
tOUTPUT_RESET
Note 14
——
10
ns
tHOLD_FSEL
Note 14
5
——
ns
tSETUP_FSEL
Note 14
5
——
ns
tOUTPUT_SYNC
Note 14
1
——
VCO
clock cycle
FSEL-to-Valid Output Transition Time
50
ns
tSETUP_OUT_SYNC
500
——
ps
Note 8.
All HSTL outputs loaded with 50
to GND.
Note 9.
The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the
same voltage and temperature.
Note 10. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature.
Note 11. Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC =Tn
Tn+1 where T is the time between rising edges of the output signal.
Note 12. Period Jitter definition: For a specified amount of time (i.e., 1ms), there are N periods of a signal, and Tn is defined as the average period of
that signal. Period jitter is defined as the variation in the period of the output signal for corresponding edges relative to Tn.
Note 13. Using recommended loop filter components.
Note 14. See “Timing Diagrams."
AC ELECTRICAL CHARACTERISTICS
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