參數資料
| 型號： | SY89295UTI TR |
| 廠商： | Micrel Inc |
| 文件頁數： | 13/17頁 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-TQFP |
| 標準包裝： | 1,000 |
| 系列： | Precision Edge® |
| 標片/步級數： | 1024 |
| 功能： | 可編程 |
| 延遲到第一抽頭： | 3.2ns |
| 接頭增量： | 10ps |
| 可用的總延遲： | 3.2ns ~ 14.8ns |
| 獨立延遲數： | 1 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應商設備封裝： | 32-TQFP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY89295UTITR SY89295UTITR-ND |
Micrel, Inc.
SY89295U
March 2011
5
M9999-032511
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
23, 25, 26, 27, 29,
30, 31, 32, 1, 2
D[9:0]
CMOS, ECL, or TTL Control Bits: These control signals adjust the delay from IN to Q. See
“AC Electrical Characteristics” for delay values. In addition, see “Interface Applications”
section which illustrates the proper interfacing techniques for different logic standards.
D[9:0] contains pull-downs and defaults LOW when left floating. D0 (LSB), and D9 (MSB).
See “Typical Operating Characteristics” for delay information.
3
D10
CMOS, ECL, or TTL Control Bit: This bit is used to cascade devices for an extended
delay range. In addition, it drives CASCADE, and /CASCADE. Further, D[10] contains a
pull-down and defaults LOW when left floating.
4, 5
IN, /IN
LVPECL/ECL Signal Input: Input signal to be delayed. IN contains a 75k pull-down and
will default to a logic LOW if left floating.
6
VBB
(1)
Reference Voltage Output: When using a single-ended input signal source to IN or /IN,
connect the unused input of the differential pair to this pin. This pin can also be used to
re-bias AC-coupled inputs to IN and /IN. When used, de-couple to VCC using a 0.01F
capacitor, otherwise leave floating if not used. Maximum sink/source is ±0.5mA.
Reference Voltage Output: Connect this pin to VCF when D[9:0], and D[10] is ECL..
Logic Standard
VCF Connects to:
LVPECL
VEF,
(1)
CMOS
No Connect
7
VEF
TTL
1.5V Source
8
VCF
Reference Voltage Input: The voltage driven on VCF sets the logic transition threshold for
D[9:0], and D[10].
9, 24, 28
GND,
Exposed Pad(2)
Negative Supply: For MLF
package, exposed pad must be connected to a ground plane
that is the same potential as the ground pin.
10
LEN
ECL Control Input: When HIGH latches the D[9:0] and D[10] bits. When LOW, the D[9:0]
and D[10] latches are transparent.
11
SETMIN
ECL Control Input: When HIGH, D[9:0] registers are reset. When LOW, the delay is set by
SETMAX or D[9:0] and D[10]. SETMIN contains a pull-down and defaults LOW when left
floating.
12
SETMAX
ECL Control Input: When SETMAX is set HIGH and SETMIN is set LOW, D[9:0] =
1111111111. When SETMAX is LOW, the delay is set by SETMIN or D[9:0] and D[10].
SETMAX contains a pull-down and defaults LOW when left floating.
13, 18, 19, 22
VCC
Positive Power Supply: Bypass with 0.1F and 0.01F low ESR capacitors.
14, 15
/Cascade,
Cascade
LVPECL Differential Output: The outputs are used when cascading two or more
SY89295U to extend the delay range.
16
/EN
LVPECL Single-Ended Control Input: When LOW, Q is delayed from IN. When HIGH, Q is
a differential LOW. /EN contains a pull-down and defaults LOW when left floating.
20, 21
/Q, Q
LVPECL Differential Output: Q is a delayed version of IN. Always terminate the output
with 50 to VCC – 2V. See “Output Interface Applications” section.
17
NC
No Connect.
Notes:
1. Single-ended operation is only functional at 3.3V.
2. MLF
package only.
相關PDF資料 |
PDF描述 |
|---|---|
| SY89296UTI TR | IC DELAY LINE 1024TAP 32-TQFP |
| SY89297UMH TR | IC DELAY LINE 1024TAP 2NS 24-MLF |
| SY897132LKY TR | IC LINK REPLICATOR 28TSSOP |
| TC1320EUATR | IC DAC 8BIT 2WIRE I2C 8MSOP |
| TC1321EUATR | IC DAC 10BIT 2WIRE I2C 8MSOP |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SY89296U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL |
| SY89296U_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V/3.3V 1.5GHz Precision LVPECL Programmable Delay |
| SY89296UMG | 功能描述:延遲線/計時元素 2.5V/3.3V PECL Delay Line (I Temp, Green) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| SY89296UMG TR | 功能描述:延遲線/計時元素 2.5V/3.3V PECL Delay Line (I Temp, Green) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| SY89296UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL |
發(fā)布緊急采購，3分鐘左右您將得到回復。