參數(shù)資料
型號(hào): SY89231UMG
廠商: Micrel Inc
文件頁(yè)數(shù): 6/15頁(yè)
文件大小: 0K
描述: IC CLOCK DIVIDER LVDS 16-MLF
標(biāo)準(zhǔn)包裝: 100
系列: Precision Edge®
類型: 時(shí)鐘除法器
PLL: 無(wú)
輸入: CML,LVDS,PECL
輸出: LVDS
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/是
頻率 - 最大: 3.2GHz
除法器/乘法器: 是/無(wú)
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1090 (CN2011-ZH PDF)
其它名稱: 576-2113-5
576-2113-5-ND
576-2965-5
Micrel, Inc.
SY89231U
November 2007
M9999-110507-A
hbwhelp@micrel.com or (408) 955-1690
14
LVDS Output Interface Applications
LVDS specifies a small swing of 325mV typical, on a
nominal 1.2V common mode above ground. The
common mode voltage has tight limits to permit large
variations in the ground between and LVDS driver and
receiver. Also, change in common mode voltage, as a
function of data input, is kept to a minimum, to keep
EMI low.
Figure 5a. LVDS Differential Measurement
Figure 5b. LVDS Common Mode Measurement
Related Product and Support Documentation
Part Number
Function
Datasheet Link
SY89228U
1GHz Precision, LVPECL ÷3, ÷5 Clock
Divider with Fail Safe Input and Internal
Termination
SY89229U
1GHz Precision, LVDS ÷3, ÷5 Clock Divider
with Fail Safe Input and Internal Termination
SY89230U
3.2GHz Precision, LVPECL ÷3, ÷5 Clock
Divider
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