參數(shù)資料
型號(hào): SY54016RMG TR
廠商: Micrel Inc
文件頁數(shù): 6/13頁
文件大?。?/td> 0K
描述: IC RCVR/LINE DVR CML LV 8-MLF
產(chǎn)品培訓(xùn)模塊: High Bandwidth Product Overview
標(biāo)準(zhǔn)包裝: 1
邏輯類型: 差分接收器/驅(qū)動(dòng)器
電源電壓: 2.375 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤,8-MLF?
供應(yīng)商設(shè)備封裝: 8-MLF?(2x2)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1088 (CN2011-ZH PDF)
其它名稱: 576-3069-6
Micrel, Inc.
SY54016R
June 2010
2
M9999-061110-A
hbwhelp@micrel.com
Ordering Information
(1)
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY54016RMGTR
(2)
MLF-8
Industrial
016R with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
8-Pin MLF
(MLF-8)
Pin Description
Pin Number
Pin Name
Pin Function
2,3
IN, /IN
Differential Input: This input pair is the differential signal input to the device. Input
accepts differential signals as small as 100mV (200mVPP). Each input pin internally
terminates with 50 to the VT pin. If the input swing falls below a certain threshold
(typical 30mV), the Fail Safe Input (FSI) feature will guarantee a stable output by
latching the output to its last valid state.
1
VT
Input Termination Center-Tap: Each side of the differential input pair terminates to
VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC-coupling, bypass VT with 0.1F low ESR capacitor to
VCC. See “Interface Applications” subsection and Figure 2a.
8
VCC
Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to
the VCC pin as possible. Supplies input and core circuitry.
5
VCCO
Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the VCCO
pin as possible. Supplies the output buffer.
4
GND,
Exposed pad
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pin.
7,6
Q, /Q
CML Differential Output Pair: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Interface Applications” subsection for
termination information.
or (408) 955-1690
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