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參數(shù)資料
| 型號(hào)： | SY05-HF |
| 廠商： | Raltron Electronics Corporation |
| 英文描述： | SYNCHRONOUS EQUIPMENT MULTI OUTPUT HIGH FREQUENCY HITLESS SWITCHING |
| 中文描述： | 同步設(shè)備多輸出的高頻過(guò)沖切換 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大小： | 198K |
| 代理商： | SY05-HF |
SYNCHRONOUS EQUIPMENT
MULTI OUTPUT HIGH FREQUENCY HITLESS SWITCHING
- SY05-HF
RALTRON ELECTRONICS CORP.
!
10651 N.W.19
th
St
!
Florida 33172
!
U.S.A.
Tel: 305 593-6033
!
Fax: 305-594-3973
!
e-mail: sales@raltron.com
!
Internet: http://www.raltron.com
Figure 1. - The functional block diagram of SY05-HF
The SY05-HF synchronization module is a high frequency PLL that performs hitless switching plus additional features
necessary for timing at high-speed Line Interface Cards. The functional block diagram is shown in figure 1. The SY05-HF
receives two reference signals, usually 19.44MHz and using PLL synthesizer generates a high frequency signal necessary
for transceivers or framers. The PLL that is complemented by high-speed logic that provide processing, switching between
the timing modes, alarm and status messages and etc. A high quality VCXO provides very low jitter at the output. The
additional outputs are provided using a divider.
The module supports two operating modes: AUTO mode is the mode where all switching are done automatically and
MANUAL mode is where unit will switch according to the two external control pins CON1 and CON2.
CON1
CON2
Operational mode
0
0
Free-run (Unlocked)
1
0
Locked to EX REF 1
0
1
Locked to EX REF 2
1
1
Locked to TLB REF
The module operates in the following four timing modes: 1) Free-run, 2) Locked to EX REF1, 3) Locked to EX REF2 and 4)
Locked to TBL REF. Free-run it a mode the unit is unlocked to either of the inputs. The accuracy of the output frequencies
in this mode is equal to the accuracy of free running VCXO. Locked to EX REF 1 is the mode where the output of the
module is phase locked to input reference 1. Locked to EX REF 2 is the mode where the output of the module is phase
locked to input reference 2, Locked to TBL REF is the mode where is the output of the module is phase locked to the signal
used in Time Loop-back operation.
DESCRIPTION
MUX,
COUNTERS
&
CONTROL
LOGIC
PLL
(PD+
LF)
÷
OUT 1
PECL
OUT 3,4
& 5 PECL
STATUS
SIGNALS
CU#1
STATUS
SIGNALS
CU#2
EX REF1
EX REF2
CNT1 CNT2
TLB REF
ALARM &
STATUS
REV/NONREV
VCXO
OUT 2
CMOS
AUTO/MAN
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