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參數(shù)資料
| 型號： | SY01-S3T |
| 廠商： | Raltron Electronics Corporation |
| 英文描述： | SYNCHRONOUS EQUIPMENT TCXO BASED STRATUM 3 CLOCK UNIT |
| 中文描述： | 基于同步設(shè)備溫補地層3時鐘單元 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 182K |
| 代理商： | SY01-S3T |
SYNCHRONOUS EQUIPMENT
TCXO BASED STRATUM 3 CLOCK UNIT – SY01-S3T
RALTRON ELECTRONICS CORP.
§
10651 N.W.19
th
St
§
Florida 33172
§
U.S.A.
Tel: 305 593-6033
§
Fax: 305-594-3973
§
e-mail: sales@raltron.com
§
Internet: http:/www.raltron.com
Figure 1. - The functional block diagram of SY01-S3T
The SY01-S3T synchronization module is a Digital PLL (DPLL), which utilizes application specific software in the
digital signal processor (DSP). The DSP is complemented by fast hardware logic (CPLD) where all multiplexers,
counters, dividers, phase detectors, output frequency converters and other control logic circuits are completely
implemented. The functional block diagram with maximum configuration is shown in figure 1. Depending on the
application, the user can specify an appropriate configuration to fit their system requirements. The basic configuration
utilizes one DPLL with an TCXO as on-board oscillator, shown in figure 1 as the shaded boxes. The TCXO is driven by
a digital-to-analog converter (DAC1) and provides the accurate and stable signal under all conditions. The output
frequency converters scale the output frequency from the oscillator. For other configurations, please contact Raltron.
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The module operates in the following four timing modes:
Free-run
In this mode the unit is unlocked to either of the inputs. The accuracy of the output frequencies in this mode is
±4.6ppm. Free-run mode is typically used when a master clock source is required, not valid history of data for the
Holdover mode, or immediately following system power-up before network synchronization is achieved. In the Free-run
Mode, the SY01-S3T provides timing and synchronization signals that are based on the accuracy of on-board
oscillators only, and are not synchronized to the reference signals.
Holdover
In this mode the module has lost its reference inputs and is utilizing stored timing data, called history, to control the
output frequency. Holdover Mode is typically used while network synchronization is temporarily disrupted. In Holdover
Mode, the SY01-S3T provides timing, based on data from the history buffer, while unlocked to an external reference
signal. The history data is determined while the device is locked to an external reference signal. The stability of the
output signal in holdover mode depends primarily on the stability of on-board oscillator and environment effects where
DESCRIPTION
N
PD1
PD2
MUX
CONTROL
LOGIC
M
DSP
FLASH
RAM
DAC
1
DAC
2
TCXO
VCXO
Temp.
Sensor
OUTPUT
FREQUENCY
CONVERTERS
EX REF1
EX REF2
CNT1
CNT2
ALARM OUT
PLL UNLOCK
HOLDOVER
REF 1
REF 2
FREE RUN
SCI
J-TAG
OUT
OPT OUT
CPLD
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