參數(shù)資料
型號: SX8723E083TDT
元件分類: ADC
英文描述: 5-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PDSO12
封裝: 4 X 4 MM, ROHS COMPLIANT, MLPD-12
文件頁數(shù): 7/53頁
文件大小: 3978K
代理商: SX8723E083TDT
ADVANCED COMMUNICATIONS & SENSING
V1.8 2009 Semtech Corp.
www.semtech.com
15
SX8723
ZoomingADC for Pressure and Temperature Sensing
ZoomingADC
Features
The ZoomingADC is a complete and versatile low-power analog front-end interface typically intended for sensing
applications.
In the following text the ZoomingADC will be referred as ZADC.
The key features of the ZADC are:
Programmable 6 to 16-bit dynamic range over-sampled ADC
Flexible gain programming between 0.5 and 1000
Flexible and large range offset compensation
3-channel differential or 5-channel single-ended input
2-channel differential reference inputs
Power saving modes
Overview
Figure 8 - ZADC General Functional Block Diagram
The total acquisition chain consists of an input multiplexer, 3 programmable gain amplifier stages and an over
sampled A/D converter. The reference voltage can be selected on two different channels. Two offset compensation
amplifiers allow for a wide offset compensation range. The programmable gain and offset allow the application to
zoom in on a small portion of the reference voltage defined input range.
ZADC Description
Acquisition Chain
Figure 8 shows the general block diagram of the acquisition chain (AC). A control block (not shown in Figure 8)
manages all communications with the 2-WIRE peripheral. The clocking is derived from the internal 4 MHz
Oscillator.
Analog inputs can be selected through a 6 input multiplexer, while reference input is selected between two differential
channels. It should however be noted that only 5 acquisition channels (including the VREF) are available when
configured as single ended since the input amplifier is always operating in differential mode with both positive and
negative input selected through the multiplexer.
The core of the zooming section is made of three differential programmable amplifiers (PGA). After selection of an
input and reference signals
VIN and VREF,ADC combination, the input voltage is modulated and amplified through
Input
Selection
Analog
Inputs
Reference
Selection
Reference
Inputs
GD1
OFF2
GD2
OFF3
GD3
+
-
+
-
ADC
f
s
f
s
V
IN
V
D1
V
D2
V
IN,ADC
V
REF,ADC
PGA1
PGA2
PGA3
Gain 1
Gain 2
Offset 2
Gain 3
Offset 3
V
SS
V
REF
AC
2
AC
3
AC
4
AC
5
V
SS
V
BATT
V
SS
V
REF
AC
0
AC
1
-
+
-
+
ZOOM
16
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