參數(shù)資料
型號： STR711FR0T6
廠商： 意法半導體
英文描述： ARM7TDMI⑩ 16/32-BIT MCU WITH FLASH, USB, CAN 5 TIMERS, ADC, 10 COMMUNICATIONS INTERFACES
中文描述： 16/32位微控制器ARM7TDMI的⑩5定時器，ADC和10 COMMUNICAT離子接口與閃存，USB，可以
文件頁數(shù)： 13/49頁
文件大小： 659K
代理商： STR711FR0T6
STR71xF - INTRODUCTION
13/49
40
K3
V
33IO-PLL
S
Supply voltage for digital I/O circuitry and for PLL refer-
ence
Not connected (not bonded)
Ground voltage for digital I/O circuitry and for PLL ref-
erence
Not connected (not bonded)
Debug Mode request input (active high)
Clock output (f
PCLK2
)
Note:
Enabled by CKDIS register
in APB Bridge 2
Reference clock input
Port
0.15
Not connected (not bonded)
Realtime Clock input and input of 32 kHz oscillator am-
plifier circuit
Output of 32 kHz oscillator amplifier circuit
Input: Hardware Standby mode entry input active low.
Caution:
External pull-up to V
33
required to select nor-
mal mode.
Output: Standby mode active low output following Soft-
ware Standby mode entry.
Note
: In Standby mode all pins are in high impedance
except those marked Active in Stdby
41
M2
N.C.
42
L4
V
SSIO-PLL
S
43
44
M4
M3
N.C.
DBGRQS
I
C
T
45
K4
CKOUT
O
8mA
X
46
J4
CK
P0.15/WAKE-
UP
N.C.
I
C
47
M5
I
pu T
T
X 4mA
X
Wakeup from Standby mode input.
48
L5
49
K5
RTCXTI
50
J5
RTCXTO
51
M6
STDBY
I/O
C
T
4mA X
X
52
53
54
M7
J6
L6
RSTIN
N.C.
V
SSBKP
I
C
T
X Reset input
Not connected (not bonded)
X Stabilisation for low power voltage regulator.
Stabilisation for low power voltage regulator. Requires
external capacitors of at least 1μF between V
18BKP
and
V
SS18BKP
. See
Figure 5
.
Note:
If the low power voltage regulator is bypassed,
this pin can be connected to an external 1.8V supply.
Not connected (not bonded)
Not connected (not bonded)
Stabilisation for main voltage regulator. Requires exter-
nal capacitors of at least 10μF + 33nF between V
18
and
V
SS18
. See
Figure 5
.
Stabilisation for main voltage regulator.
Not connected (not bonded)
S
55
K6
V
18BKP
S
X
56
57
H5
H6
N.C.
N.C.
58
G6
V
18
S
59
60
L7
K7
V
SS18
N.C.
S
Table 3. STR710 Pin Description
Pin n°
Pin Name
T
I
1
Input
Output
A
Main
function
(after
reset)
Alternate function
T
B
i
C
O
P
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