
STRAP OPTION
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Issue 2.2 - October 13, 2000
Note 1; Setting of Strap Options MD [15:2] have
no effect on the DRAM Controller but are purely
meant for software issues. i.e. Readable in a reg-
ister.
Note 2; The settings for these Straps is show in
the table below:
For further details refer to Application Note 1297
3.1 Power on strap registers description
3.1.1 Strap register 0 Index 4Ah (Strap0)
Bits 7-0; This register reflect the status of pins
MD[7:0] respectively. They are expected to be
connected on the system board to the SIMM con-
figuration pins as follows:
Note that the SIMM speed and type information
read here is meant only for the software and is not
used by the hardware. The software must pro-
gram the Host and graphics dram controller con-
figuration registers appropriately based on these
bits.
This register defaults to the values sampled on
MD[7:0] pins after reset.
3.1.2 Strap register 1 Index 4Bh (Strap1)
Bits 7-0; This register reflect the status of pins
MD[15:8] respectively. They are expected to be
connected on the system board to the SIMM con-
figuration pins as follows:
MD38
MD39
MD40
MD41
MD42
MD43
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Memory
Data
Lines
Refer to
Designation
Location
Actual
Settings
Set to ’0’
Set to ’1’
Strap Option
Devices Settings
MDBT*70xxxx
1
(Old)
Pull Up (1)
Pull Up (1)
MDBT*710Axx
(New)
Pull Down (0)
Pull Down (0)
MD [32]
MD[35]
Note 1; All devices with the exception of the technical
codes; MDBT*S710A
The Devices are identified using the techical code
which is the first line laser marked under the ST logo.
Bit Sampled
Bit 7
Bits 6-5
Bit 4
Bits 3-2
Bit 1
Bit 0
Description
SIMM 0 DRAM type
SIMM 0 speed
SIMM 1 DRAM type:
SIMM 1 speed
Reserved
Reserved