
SEC ASIC
4-21
STDL80
PvODyz
Open Drain Output Buffers
STDL80 POD8 Switching Characteristics
[Delays for typical process, 25 C, 3.3V, when R F
(CL : Capacitive Load [pF])
Path
Parameter
Delay [ns]
CL = 50.0pF
Delay Equations [ns]
Group1*
0.58 + 0.030*CL
0.14 + 0.066*CL
0.60 + 0.000*CL
0.73 + 0.030*CL
0.13 + 0.066*CL
0.55 + 0.000*CL
Group2*
0.59 + 0.030*CL
0.13 + 0.066*CL
0.60 + 0.000*CL
0.73 + 0.030*CL
0.13 + 0.066*CL
0.55 + 0.000*CL
Group3*
0.58 + 0.030*CL
0.13 + 0.066*CL
0.60 + 0.000*CL
0.73 + 0.030*CL
0.13 + 0.066*CL
0.55 + 0.000*CL
TN to PAD
tPHL
tF
tPLZ
tPHL
tF
tPLZ
2.08
3.44
0.60
2.23
3.43
0.55
EN to PAD
*Group1 : CL < 75, *Group2 : 75 =
<
STDL80 POD12 Switching Characteristics
[Delays for typical process, 25 C, 3.3V, when R F
(CL : Capacitive Load [pF])
Path
Parameter
Delay [ns]
CL = 50.0pF
Delay Equations [ns]
Group1*
0.64 + 0.021*CL
0.14 + 0.046*CL
0.67 + 0.000*CL
0.79 + 0.021*CL
0.15 + 0.046*CL
0.61 + 0.000*CL
Group2*
0.64 + 0.021*CL
0.13 + 0.046*CL
0.67 + 0.000*CL
0.79 + 0.021*CL
0.13 + 0.046*CL
0.61 + 0.000*CL
Group3*
0.65 + 0.021*CL
0.13 + 0.046*CL
0.67 + 0.000*CL
0.79 + 0.021*CL
0.13 + 0.046*CL
0.61 + 0.000*CL
TN to PAD
tPHL
tF
tPLZ
tPHL
tF
tPLZ
1.69
2.44
0.67
1.84
2.44
0.61
EN to PAD
*Group1 : CL < 75, *Group2 : 75 =
<
STDL80 POD16 Switching Characteristics
[Delays for typical process, 25 C, 3.3V, when R F
(CL : Capacitive Load [pF])
Path
Parameter
Delay [ns]
CL = 50.0pF
Delay Equations [ns]
Group1*
0.73 + 0.015*CL
0.19 + 0.032*CL
0.75 + 0.000*CL
0.87 + 0.015*CL
0.19 + 0.032*CL
0.70 + 0.000*CL
Group2*
0.73 + 0.015*CL
0.18 + 0.033*CL
0.75 + 0.000*CL
0.88 + 0.015*CL
0.18 + 0.033*CL
0.70 + 0.000*CL
Group3*
0.73 + 0.015*CL
0.17 + 0.033*CL
0.75 + 0.000*CL
0.87 + 0.015*CL
0.17 + 0.033*CL
0.69 + 0.000*CL
TN to PAD
tPHL
tF
tPLZ
tPHL
tF
tPLZ
1.48
1.81
0.75
1.63
1.81
0.70
EN to PAD
*Group1 : CL < 75, *Group2 : 75 =
<