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參數(shù)資料
| 型號： | ST93CS57M1013TR |
| 廠商： | 意法半導體 |
| 英文描述： | 2K 128 x 16 SERIAL MICROWIRE EEPROM |
| 中文描述： | 2K 128 × 16系列MICROWIRE的EEPROM的 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 124K |
| 代理商： | ST93CS57M1013TR |
POWER-ON DATA PROTECTION
In orderto prevent datacorruption and inadvertent
write operations during power up, a Power On
Reset(POR)circuit resetsallinternalprogramming
circuitry and sets the device in the Write Disable
mode. When V
CC
reaches its functionalvalue, the
deviceisproperlyreset (in the Write Disablemode)
and is ready to decode and execute an incoming
instruction. A stable V
CC
must be applied before
any logic signal.
INSTRUCTIONS
The ST93CS56/57 has eleven instructions, as
shown in Table 6. Each instructionis composedof
a 2 bitop-code andan 8bit address. Eachinstruc-
tion is preceded by the rising edge of the signal
appliedontheChipSelect(S)input(assumingthat
the Clock C is low). The data input D is then
sampled upon the following rising edges of the
clock C until a ’1’ is sampled and decoded by the
ST93CS56/57as a Start bit.
The ST93CS56/57is fabricatedin CMOS technol-
ogy andis thereforeableto runfrom zeroHz(static
input signals) upto themaximumratings(specified
in Table5).
Read
The Read instruction (READ) outputs serial data
on the Data Output (Q). When a READ instruction
is received, the instruction and address are de-
codedandthe datafrom thememoryis transferred
into anoutputshiftregister.Adummy’0’bitisoutput
first followedby the16 bit word with the MSB first.
Instruction
Description
W
pin
(1)
PRE
pin
Op
Code
Address
(1,2)
Data
Additional
Information
READ
Read Data from
Memory
X
’0’
10
A7-A0
Q15-Q0
WRITE
Write Data to Memory
’1’
’0’
01
A7-A0
D15-D0
Write is executed if
the address is not
inside the Protected
area
PAWRITE
Page Write to Memory
’1’
’0’
11
A7-A0
D15-D0
Write is executed if
all the addresses
are not inside the
Protected area
WRALL
Write All Memory
’1’
’0’
00
01XX XXXX
D15-D0
Write all data if the
Protect Register is
cleared
WEN
Write Enable
’1’
’0’
00
11XX XXXX
WDS
Write Disable
X
’0’
00
00XX XXXX
PRREAD
Protect Register Read
X
’1’
10
XXXX XXXX
Q8-Q0
Data Output =
Protect Register
content + Protect
Flag bit
PRWRITE
Protect Register Write
’1’
’1’
01
A7-A0
Data above
specifiedaddress
A7-A0 are
protected
(2)
PRCLEAR
Protect Register Clear
’1’
’1’
11
1111 1111
Protect Flag is also
cleared (cleared
Flag = 1)
PREN
Protect Register Enable
’1’
’1’
00
11XX XXXX
PRDS
Protect Register Disable
’1’
’1’
00
0000 0000
OTPbit is set
permanently
Notes:
1. X = don’t care bit.
2. Address bit A7 is notdecoded by the ST93CS56/57.
Table 6. InstructionSet
6/16
ST93CS56, ST93CS57
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