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參數(shù)資料
| 型號： | ST90135 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| 中文描述： | 微控制器16位產(chǎn)品的家庭多達(dá)64K的ROM /OTP/ EPROM和2K的內(nèi)存 |
| 文件頁數(shù)： | 139/190頁 |
| 文件大?。?/td> | 1152K |
| 代理商： | ST90135 |
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ST90158 - SERIAL PERIPHERAL INTERFACE (SPI)
SERIAL PERIPHERAL INTERFACE
(Cont’d)
9.4.9 Register Description
It is possible to have up to 3 independent SPIs in
the same device (refer to the device block dia-
gram). In this case they are named SPI0 thru
SPI2. If the device has one SPI converter it uses
the register adresses of SPI0. The register map is
the following:
Note:
In the register description on the following
pages, registerand pagenumbers are given using
the example of SPI0.
SPI DATA REGISTER (SPIDR)
R253 - Read/Write
Register Page: 0
Reset Value: undefined
Bit 7:0 =
D[0:7]
: SPI Data
This register contains the data transmitted and re-
ceived by the SPI. Data is transmitted bit 7 first,
and incoming data is received into bit 0. Transmis-
sion is started by writing to this register.
Note:
SPIDR state remains undefined until the
end of transmission of the first byte.
SPI CONTROLREGISTER (SPICR)
R254
-
Read/Write
Register Page: 0
Reset Value: 0000 0000 (00h)
Bit 7 =
SPEN
: Serial Peripheral Enable.
0: SCK and SDO are kept tristate.
1: Both alternate functions SCK and SDO are ena-
bled.
Note:
furthermore, SPEN (together with the BMS
bit) affects the selection of the source for interrupt
channel B0. Transmission starts when data is writ-
ten to the SPIDR Register.
Bit 6 =
BMS
: S-bus/I
2
C-bus Mode Selector
0: Perform a re-initialisation of the SPI logic, thus
allowing recovery procedures after a RX/TX fail-
ure.
1: Enable S-bus/I
2
C-bus arbitration,clock synchro-
nization and Start/ Stop detection (SPI used in
an S-bus/I
2
C-bus protocol).
Note:
when the BMS bit is reset, it affects (togeth-
er with the SPEN bit) the selection of the source
for interrupt channel B0.
Bit 5 =
ARB
: Arbitration flag bit.
This bit is set by hardware and can be reset by
software.
0: S-bus/I
2
C-bus stop condition is detected.
1: Arbitration lost by the SPI in S-bus/I
2
C-bus
mode.
Note:
when ARB is set automatically, theSDO pin
is set to a high value until a write instruction on
SPIDR is performed.
Bit 4 =
BUSY
: SPI Busy Flag
This bit is set by hardware. It allows the user to
monitor the SPI status by polling its value.
0: No transmission in progress.
1: Transmission in progress.
Bit 3 =
CPOL
: Transmission Clock Polarity.
CPOL controls the normal or steady state value of
the clock when data is not being transferred.
Please refer to the following tableand to Figure 74
to see this bit action (together with the CPHA bit).
Note:
As the SCK line is held in a highimpedance
state when the SPI is disabled (SPEN = “0”), the
SCK pin must be connected to V
SS
or to V
CC
through a resistor, depending on the CPOL state.
Polarity should be set during the initialisation rou-
tine, in accordance with the setting of all peripher-
als, and should not be changed during program
execution.
Register
SPIDR R253
SPICR R254
SPIDR1 R253
SPICR1 R254
SPIDR2 R245
SPICR2 R246
SPIn
SPI0
SPI0
SPI1
SPI1
SPI2
SPI2
Page
0
0
7
7
7
7
7
0
D7
D6
D5
D4
D3
D2
D1
D0
7
0
SPEN
BMS
ARB
BUSY
CPOL
CPHA
SPR1
SPR0
9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST90135M4Q6 | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| ST90135M5Q6 | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| ST90135M6Q6 | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| ST90135M6T6 | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| ST90158 | 8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST90135M4Q6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
| ST90135M4T6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| ST90135M5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY |
| ST90135M5LVT6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8/16-BIT MICROCONTROLLER (MCU) WITH 16 TO 64K ROM. OTP OR EPROM. 512 TO 2K RAM - ST9 + FAMILY |
| ST90135M5Q6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8/16-BIT MCU FAMILY WITH UP TO 64K ROM/OTP/EPROM AND UP TO 2K RAM |
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