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參數(shù)資料
| 型號： | ST7LNB1Y0M6 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, EEPROM, 8 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 536K |
| 代理商： | ST7LNB1Y0M6 |
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ST7LNB1Y0
Electrical characteristics
Static and Dynamic latch-up
●
LU: 3 complementary static tests are required on 10 parts to assess the latch-up
performance. A supply overvoltage (applied to each power supply pin) and a current
injection (applied to each input, output and configurable I/O pin) are performed on each
sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,
refer to the application note AN1181.
●
DLU: Electrostatic discharges (one positive then one negative test) are applied to each
pin of 3 samples when the micro is running to assess the latch-up performance in
dynamic mode. Power supplies are set to the typical values, the oscillator is connected
as near as possible to the pins of the micro and the component is put in reset mode.
This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. For more details,
refer to the application note AN1181.
Table 28.
Electrical sensitivities(1)
1.
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than
the JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard.
B Class strictly covers all the JEDEC criteria (international standard).
Symbol
Parameter
Conditions
Class 1)
LU
Static latch-up class
TA=+25°C
A
DLU
Dynamic latch-up class
VDD=5.5 V, fOSC=4MHz,
TA=+25 °C
A
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