參數(shù)資料
型號(hào)： ST7FLITE10F1B6
廠商： 意法半導(dǎo)體
英文描述： 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 4 TIMERS, SPI
中文描述： 8位單電壓閃存存儲(chǔ)器，數(shù)據(jù)EEPROM，模數(shù)轉(zhuǎn)換器，4定時(shí)器，微控制器的SPI
文件頁(yè)數(shù)： 77/131頁(yè)
文件大小： 2046K
代理商： ST7FLITE10F1B6
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ST7LITE1
77/131
SERIAL PERIPHERAL INTERFACE
(Cont’d)
11.4.6 Low Power Modes
11.4.6.1 Using the SPI to wake-up the Device
from Halt mode
In slave configuration, the SPI is able to wake-up
the
Device
from HALT mode through a SPIF inter-
rupt. The data received is subsequently read from
the SPIDR register when the software is running
(interrupt vector fetch). If multiple data transfers
have been performed before software clears the
SPIF bit, then the OVR bit is set by hardware.
Note:
When waking up from Halt mode, if the SPI
remains in Slave mode, it is recommended to per-
form an extra communications cycle to bring the
SPI from Halt mode state to normal state. If the
SPI exits from Slave mode, it returns to normal
state immediately.
Caution:
The SPI can wake-up the
Device
from
Halt mode only if the Slave Select signal (external
SS pin or the SSI bit in the SPICSR register) is low
when the
Device
enters Halt mode. So if Slave se-
lection is configured as external (see
Section
11.4.3.2
), make sure the master drives a low level
on the SS pin when the slave enters Halt mode.
11.4.7 Interrupts
Note
: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
Mode
Description
WAIT
No effect on SPI.
SPI interrupt events cause the Device to exit
from WAIT mode.
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI oper-
ation resumes when the Device is woken up
by an interrupt with “exit from HALT mode”
capability. The data received is subsequently
read from the SPIDR register when the soft-
ware is running (interrupt vector fetching). If
several data are received before the wake-
up event, then an overrun error is generated.
This error can be detected after the fetch of
the interrupt routine that woke up the Device.
HALT
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
SPI End of Trans-
fer Event
Master Mode
Fault Event
Overrun Error
SPIF
SPIE
Yes
Yes
MODF
Yes
No
OVR
Yes
No
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST7FLITE10F1B6 制造商:STMicroelectronics 功能描述:IC 8BIT FLASH MCU 7FLITE10 DIP20
ST7FLITE10F1M6 功能描述:8位微控制器 -MCU Flash 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST7FLITE15 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 4 TIMERS, SPI
ST7FLITE15F1B6 功能描述:8位微控制器 -MCU Flash 4K SPI RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST7FLITE15F1B6 制造商:STMicroelectronics 功能描述:IC 8BIT FLASH MCU 7FLITE15 DIP20
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