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參數(shù)資料
| 型號： | ST7FL05Y0MATRE |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 62/104頁 |
| 文件大?。?/td> | 2151K |
| 代理商： | ST7FL05Y0MATRE |
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Obsolete
Product(s)
- Obsolete
Product(s)
ST7L05, ST7L09
60/104
SERIAL PERIPHERAL INTERFACE (Cont’d)
11.3.6 Low Power Modes
11.3.6.1 Using the SPI to wakeup the MCU from
Halt mode
In slave configuration, the SPI is able to wakeup
the ST7 device from HALT mode through a SPIF
interrupt. The data received is subsequently read
from the SPIDR register when the software is run-
ning (interrupt vector fetch). If multiple data trans-
fers have been performed before software clears
the SPIF bit, then the OVR bit is set by hardware.
Note: When waking up from Halt mode, if the SPI
remains in Slave mode, it is recommended to per-
form an extra communications cycle to bring the
SPI from Halt mode state to normal state. If the
SPI exits from Slave mode, it returns to normal
state immediately.
Caution: The SPI can wake up the ST7 from Halt
mode only if the Slave Select signal (external SS
pin or the SSI bit in the SPICSR register) is low
when the ST7 enters Halt mode. So if Slave selec-
tion is configured as external (see Section
11.3.3.2), make sure the master drives a low level
on the SS pin when the slave enters Halt mode.
11.3.7 Interrupts
Note: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
Mode
Description
WAIT
No effect on SPI.
SPI interrupt events cause the device to exit
from WAIT mode.
HALT
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI oper-
ation resumes when the MCU is woken up
by an interrupt with “exit from HALT mode”
capability. The data received is subsequent-
ly read from the SPIDR register when the
software is running (interrupt vector fetch-
ing). If data is received before the wake-up
event, then an overrun error is generated.
This error can be detected after the fetch of
the interrupt routine that woke up the device.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
SPI End of Trans-
fer Event
SPIF
SPIE
Yes
Master Mode Fault
Event
MODF
No
Overrun Error
OVR
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST7FL05Y0MB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with single voltage Flash memory, data EEPROM, ADC, timers, SPI |
| ST7FL05Y0MBE | 制造商:STMicroelectronics 功能描述: |
| ST7FL05YMAE | 制造商:STMicroelectronics 功能描述:MCU 8BIT ST7 CISC 1.5KB FLASH 3.3V/5V 16SOIC - Rail/Tube |
| ST7FL09Y0MA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with single voltage Flash memory, data EEPROM, ADC, timers, SPI |
| ST7FL09Y0MAE | 功能描述:8位微控制器 -MCU 8-bit MCU Automotive RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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