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參數(shù)資料
| 型號： | ST78C36A |
| 廠商： | Exar Corporation |
| 英文描述： | ECP/EPP Parallel Printer Port with 16 Byte FIFO(ECP/EPP并行打印機端口（帶16字節(jié)先進先出）) |
| 中文描述： | 支持ECP / EPP并行打印機端口（支持ECP / EPP并行打印機端口（帶16字節(jié)先進先出），16字節(jié)FIFO） |
| 文件頁數(shù)： | 17/27頁 |
| 文件大?。?/td> | 204K |
| 代理商： | ST78C36A |
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ST78C36/36A
6-37
Rev. 4.20
“ECP MODE” SIGNAL DESCRIPTIONS
Signal
Name
Signal
Type
ECP mode
Name
Description
-STROBE
O
HostClk
Used with PeriphAck to transfer data or address information in
the forward direction.
-AUTOFD
O
HostAck
Provides Command / Data status in the forward direction. Used
with PeriphClk to transfer data in the reverse direction.
-SLCTIN
O
1284Active
Set high when host is in a 1284 transfer mode.
INIT
O
-ReverseReq
Driven low to put the channel in reverse direction.
-ACK
I
PeriphClk
Used with HostAck to transfer data in the reverse direction.
BUSY
I
PeriphAck
Used with HostClk to transfer data or address information in the
forward direction. Provides Command / Data status in the
reverse direction.
PE
I
-AckReverse
Driven low to acknowledge ReverseRequest.
SLCT
I
Xflag
Extensibility flag.
-ERROR
I
-PeriphReq
Set low by peripheral to indicate that reverse dat is available.
PD0-PD7
I/O
D0-D7
Bi-directional data lines.
ECP Mode Forawrd Data and Command Transfer
Cycle
1. Host places data on the data lines and indicates a
data cycle by setting HostAck high.
2. Host asserts HostClk low to indicate valid data.
3. Peripheral acknowledge host by setting PeriphAck
high.
4. Host sets HostClk high. This is the edge that should
be used to clock the data in to the peripheral.
5. Peripheral sets PeriphAck low to indicate that it is
ready for the next byte.
6. The cycle repeats, but this time it is command cycle
because HostAck is low.
ECP Mode Reverse Data and Command Transfer
Cycle
1. The Host requests a reverse channel transfer by
setting -ReverseReq low.
2. The peripheral signals that it is okay to proceed by
setting -AckReverse low.
3. The peripheral places data on the data lines and
indicates a data cycle by setting PeriphAck high.
4. Peripheral asserts PeriphClk low to indicate valid
data.
5. Host acknowledges by setting HostAck high.
6. Peripheral sets PeriphClk high. This is the edge that
should be used to clock the data in to the host.
7. Host sets HostAck low to indicate that it is ready for
the next byte.
8. The cycle repeats, but this time it is a Command
cycle because PeriphAck is low.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| ST78C36ACJ-0A-EVB | 功能描述:界面開發(fā)工具 Supports 78C36A 44ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST78C36ACJ44 | 制造商:EXAR 制造商全稱:EXAR 功能描述:ECP/EPP PARALLEL PRINTER PORT WITH 16-BYTE FIFO |
| ST78C36ACJ44-F | 功能描述:接口 - 專用 UART RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59 |
| ST78C36ACJ44TR-F | 制造商:Exar Corporation 功能描述:UART 1-CH 16Byte FIFO 5V 44-Pin PLCC T/R 制造商:Exar Corporation 功能描述:ST78C36ACJ44TR-F |
| ST78C36CJ-0A-EVB | 功能描述:界面開發(fā)工具 Supports 78C36 44 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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