參數(shù)資料
型號(hào): ST72F324BJ2T5
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, LQFP-44
文件頁數(shù): 5/167頁
文件大小: 2651K
代理商: ST72F324BJ2T5
On-chip peripherals
ST72323 ST72323L
102/167
9.5.3
Functional description
The conversion is monotonic, meaning that the result never decreases if the analog input
does not and never increases if the analog input does not.
If the input voltage (VAIN) is greater than VAREF (high-level voltage reference) then the
conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without
overflow indication).
If the input voltage (VAIN) is lower than VSSA (low-level voltage reference) then the
conversion result in the ADCDRH and ADCDRL registers is 00 00h.
The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH
and ADCDRL registers. The accuracy of the conversion is described in the Electrical
Characteristics Section.
RAIN is the maximum recommended impedance for an analog input signal. If the impedance
is too high, this will result in a loss of accuracy due to leakage and sampling not being
completed in the allocated time.
A/D converter configuration
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to
Section 8: I/O ports. Using these pins as analog inputs does not affect the ability of the port
to be read as a logic input.
In the ADCCSR register:
Select the CS[3:0] bits to assign the analog channel to convert.
Starting the conversion
In the ADCCSR register:
Set the ADON bit to enable the A/D converter and to start the conversion. From this
time on, the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
The EOC bit is set by hardware.
The result is in the ADCDR registers.
A read to the ADCDRH resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
Poll the EOC bit
2.
Read the ADCDRL register
3.
Read the ADCDRH register. This clears EOC automatically.
Note:
The data is not latched, so both the low and the high data register must be read before the
next conversion is complete, so it is recommended to disable interrupts while reading the
conversion result.
To read only 8 bits, perform the following steps:
1.
Poll the EOC bit
2.
Read the ADCDRH register. This clears EOC automatically.
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