參數(shù)資料
型號: ST72C171K2B6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32
封裝: SHRINK, PLASTIC, DIP-32
文件頁數(shù): 123/152頁
文件大?。?/td> 2156K
代理商: ST72C171K2B6
ST72C171
72/152
PWM AUTO-RELOAD TIMER (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the CSR register is
set and an overflow interrupt request is generated
if the overflow interrupt enable bit, OIE, in the CSR
register, is set. The OVF flag must be reset by the
user software. This interrupt can be used as a time
base in the application.
External clock and event detector mode
Using the fEXT external prescaler input clock, the
auto-reload timer can be used as an external clock
event detector. In this mode, the ARR register is
used to select the nEVENT number of events to be
counted before setting the OVF flag.
nEVENT = 256 - ARR
When entering HALT mode while fEXT is selected,
all the timer control registers are frozen but the
counter continues to increment. If the OIE bit is
set, the next overflow of the counter will generate
an interrupt which wakes up the MCU.
Figure 45. External Event Detector Example (3 counts)
COUNTER
t
FDh
FEh
FFh
FDh
OVF
CSR READ
INTERRUPT
ARR=FDh
fEXT=fCOUNTER
FEh
FFh
FDh
IF OIE=1
INTERRUPT
IF OIE=1
CSR READ
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